Commits · master · soclabs / Cortex-M0-baseline · GitLab

16 Jan, 2023 2 commits
- correct a corruption introduced into the build_mcu_fpga_pynq_z2 TCL script · 908be211
  dwf1m12 authored Jan 16, 2023
  
  908be211
- clean up FPGA build warnings (thanks Meredith) and DMA230 source paths · cb66c8a2
  dwf1m12 authored Jan 16, 2023
  
  cb66c8a2
01 Dec, 2022 1 commit
- Update README.md to include PL230 DMA · 7c0621e9
  dwf1m12 authored Dec 01, 2022
  
  7c0621e9
16 Nov, 2022 1 commit
- Update project for latest AAA PL230 DMA controller - simulation and FPGA implementation · 2963e978
  dwf1m12 authored Nov 16, 2022
  
  2963e978
15 Nov, 2022 1 commit
- upgrade design for PL230 Micro DMA with basic integration test · eb329f3c
  dwf1m12 authored Nov 15, 2022
  
  eb329f3c
22 Sep, 2022 1 commit
- update the product bundle part numbers to reflect AAA product list updates · eab38652
  dwf1m12 authored Sep 22, 2022
  
  eab38652
03 Sep, 2022 4 commits
- update v2html doc tree to match RTL updates · 2ce820a7
  dwf1m12 authored Sep 03, 2022
  
  2ce820a7
- add other Xilinx target technologies to ft1248_to_stream8 IP module · 07715c8e
  dwf1m12 authored Sep 03, 2022
  
  07715c8e
- repair SWD IO mapping, and add clock port waiver to SWDCLK on PMOD interface · f4b36d2b
  dwf1m12 authored Sep 03, 2022
  
  f4b36d2b
- pad out start of boot message to fix boot rom with ft1248 interface · 3af73ae9
  dwf1m12 authored Sep 03, 2022
  
  3af73ae9
17 Aug, 2022 1 commit
- add local ip_repo with integration components and update associated tcl build scripts · 96725d36
  dwf1m12 authored Aug 17, 2022
  
  96725d36
09 Aug, 2022 2 commits
- remove server-specific export path from official script · f0abd89b
  dwf1m12 authored Aug 09, 2022
  
  f0abd89b
- clean up ip search paths and remove a server-specific path dependency · 1ee0a88f
  dwf1m12 authored Aug 09, 2022
  
  1ee0a88f
14 Jul, 2022 1 commit
- Fix uart address in pz104 notebook · 8a9d2760
  dwf1m12 authored Jul 14, 2022
  
  8a9d2760
13 Jul, 2022 1 commit
- upgrade FPGA support for Xilinx PYNQ platform (vivado 2021.1 environment) · 980b8fab
  dwf1m12 authored Jul 13, 2022
  
  980b8fab
04 Jul, 2022 2 commits
- add the chip_pads layer for testbench tri-state IOs · 593ff7bb
  dwf1m12 authored Jul 04, 2022
  
  593ff7bb
- Add UART2 and FT1248 boot code message support, 20MHz for FPGA, 9600baud serial · c5e46524
  dwf1m12 authored Jul 04, 2022
  
  c5e46524
01 Jun, 2022 1 commit
- fpga_imp directory target board example scripts ready for experimental use · 108772f7
  dwf1m12 authored Jun 01, 2022
  
  108772f7
18 May, 2022 1 commit
- clean up clock and reset port pad connections and update GLIB dummy power pads · e35827b2
  dwf1m12 authored May 18, 2022
  
  e35827b2
25 Apr, 2022 1 commit
- update testbench to run debug tester from ft1248 output · c7aad314
  dwf1m12 authored Apr 25, 2022
  
  c7aad314
24 Apr, 2022 2 commits
- update v2html to match RTL changes · 277cac55
  dwf1m12 authored Apr 24, 2022
  
  277cac55
- rename apb_usrt and clean up connectivity · 02659ab1
  dwf1m12 authored Apr 24, 2022
  
  02659ab1
13 Apr, 2022 2 commits
- update IO library models · 7e61ba67
  dwf1m12 authored Apr 13, 2022
  
  7e61ba67
- update IOPADS, top-level and v2html doc · 88cac616
  dwf1m12 authored Apr 13, 2022
  
  88cac616
06 Apr, 2022 2 commits
- update v2html tree and mangled boot ROM · fce3b86e
  dwf1m12 authored Apr 06, 2022
  
  fce3b86e
- update docs and derived mangled files · 46a1851a
  dwf1m12 authored Apr 06, 2022
  
  46a1851a
31 Mar, 2022 1 commit
- New ADP controller integrated in place of PL230 with testbench support · 25be6a92
  dwf1m12 authored Mar 31, 2022
  
  25be6a92
14 Mar, 2022 1 commit
- Add binary text output file to ROM file generator · dd8399c1
  dwf1m12 authored Mar 14, 2022
  
  dd8399c1
21 Jan, 2022 2 commits
- cut down Flash and SRAM sizes to still run larger testcode images · 0df46495
  dwf1m12 authored Jan 21, 2022
  
  0df46495
- remove HPROT redundant interface port · debf5329
  dwf1m12 authored Jan 21, 2022
  
  debf5329
08 Jan, 2022 3 commits
- Update the new cmsdk_mcu_chip.v level of hierarchy to match cmsdk_mcu.v changes · 06db0de7
  dwf1m12 authored Jan 08, 2022
  
  06db0de7
- Improve the datestamp in bootrom.v generator to YYMMDDHHMM · b07bcb88
  dwf1m12 authored Jan 08, 2022
  
  b07bcb88
- rebuild ahb_bootrom__mangled to support alternative ROM synthesis · 37fa394f
  dwf1m12 authored Jan 08, 2022
  
  37fa394f
07 Jan, 2022 3 commits
- reference log files for CPU trace and UART2 added · cac739f9
  dwf1m12 authored Jan 07, 2022
  
  cac739f9
- added header and date stamp to bootrom.v generator · 8e53e93e
  dwf1m12 authored Jan 07, 2022
  
  8e53e93e
- program baudrate for 4800 buad @ 1MHz and update uart capture testbench · 8bc02fe7
  dwf1m12 authored Jan 07, 2022
  
  8bc02fe7
04 Jan, 2022 2 commits
- verilog changes for bootrom generation and prep for IO pads · c778f75a
  dwf1m12 authored Jan 04, 2022
  
  c778f75a
- bootrom generation and prep for IO pads · a32c8bff
  dwf1m12 authored Jan 04, 2022
  
  a32c8bff
25 Nov, 2021 2 commits
- documentation update · b35a8975
  dwf1m12 authored Nov 25, 2021
```
Merge branch 'master' of git.soton.ac.uk:dwf1m12/soclabs-cortexm0-mcu
```
  b35a8975
- fix dma configuration to pass tests · 0e40afa4
  dwf1m12 authored Nov 25, 2021
  
  0e40afa4