Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
Cortex M0 Baseline Tech
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Jira
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Deploy
Releases
Package Registry
Model registry
Operate
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
SoCLabs
Cortex M0 Baseline Tech
Commits
07715c8e
Commit
07715c8e
authored
2 years ago
by
dwf1m12
Browse files
Options
Downloads
Patches
Plain Diff
add other Xilinx target technologies to ft1248_to_stream8 IP module
parent
f4b36d2b
No related branches found
No related tags found
No related merge requests found
Changes
1
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/component.xml
+45
-407
45 additions, 407 deletions
...cu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/component.xml
with
45 additions
and
407 deletions
Cortex-M0/soclabs_demo/systems/cortex_m0_mcu/fpga_imp/ip_repo/ft1248x1_to_stream8_1.0/component.xml
+
45
−
407
View file @
07715c8e
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment
