Commits · c5e46524155f9ab984e0d31796b2d38332cc2086 · SoCLabs / Cortex M0 Baseline Tech · GitLab

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Jul 04, 2022
- Add UART2 and FT1248 boot code message support, 20MHz for FPGA, 9600baud serial · c5e46524
  dwf1m12 authored 2 years ago
  
  c5e46524
Jun 01, 2022
- fpga_imp directory target board example scripts ready for experimental use · 108772f7
  dwf1m12 authored 2 years ago
  
  FPGA-dev-v2.3
  
  108772f7
May 18, 2022
- clean up clock and reset port pad connections and update GLIB dummy power pads · e35827b2
  dwf1m12 authored 2 years ago
  
  e35827b2
Apr 25, 2022
- update testbench to run debug tester from ft1248 output · c7aad314
  dwf1m12 authored 2 years ago
  
  c7aad314
Apr 24, 2022
- update v2html to match RTL changes · 277cac55
  dwf1m12 authored 2 years ago
  
  277cac55
- rename apb_usrt and clean up connectivity · 02659ab1
  dwf1m12 authored 2 years ago
  
  02659ab1
Apr 13, 2022
- update IO library models · 7e61ba67
  dwf1m12 authored 2 years ago
  
  7e61ba67
- update IOPADS, top-level and v2html doc · 88cac616
  dwf1m12 authored 2 years ago
  
  88cac616
Apr 06, 2022
- update v2html tree and mangled boot ROM · fce3b86e
  dwf1m12 authored 3 years ago
  
  fce3b86e
- update docs and derived mangled files · 46a1851a
  dwf1m12 authored 3 years ago
  
  46a1851a
Mar 31, 2022
- New ADP controller integrated in place of PL230 with testbench support · 25be6a92
  dwf1m12 authored 3 years ago
  
  25be6a92
Mar 14, 2022
- Add binary text output file to ROM file generator · dd8399c1
  dwf1m12 authored 3 years ago
  
  dd8399c1
Jan 21, 2022
- cut down Flash and SRAM sizes to still run larger testcode images · 0df46495
  dwf1m12 authored 3 years ago
  
  0df46495
- remove HPROT redundant interface port · debf5329
  dwf1m12 authored 3 years ago
  
  debf5329
Jan 08, 2022
- Update the new cmsdk_mcu_chip.v level of hierarchy to match cmsdk_mcu.v changes · 06db0de7
  dwf1m12 authored 3 years ago
  
  06db0de7
- Improve the datestamp in bootrom.v generator to YYMMDDHHMM · b07bcb88
  dwf1m12 authored 3 years ago
  
  b07bcb88
- rebuild ahb_bootrom__mangled to support alternative ROM synthesis · 37fa394f
  dwf1m12 authored 3 years ago
  
  37fa394f
Jan 07, 2022
- reference log files for CPU trace and UART2 added · cac739f9
  dwf1m12 authored 3 years ago
  
  cac739f9
- added header and date stamp to bootrom.v generator · 8e53e93e
  dwf1m12 authored 3 years ago
  
  8e53e93e
- program baudrate for 4800 buad @ 1MHz and update uart capture testbench · 8bc02fe7
  dwf1m12 authored 3 years ago
  
  8bc02fe7
Jan 04, 2022
- verilog changes for bootrom generation and prep for IO pads · c778f75a
  dwf1m12 authored 3 years ago
  
  c778f75a
- bootrom generation and prep for IO pads · a32c8bff
  dwf1m12 authored 3 years ago
  
  a32c8bff
Nov 25, 2021
- documentation update · b35a8975
  dwf1m12 authored 3 years ago
  
  Merge branch 'master' of git.soton.ac.uk:dwf1m12/soclabs-cortexm0-mcu
  b35a8975
- fix dma configuration to pass tests · 0e40afa4
  dwf1m12 authored 3 years ago
  
  0e40afa4
Nov 24, 2021
- Update GetStarted.md to add simulation instructions · ffa1fcef
  dwf1m12 authored 3 years ago
  
  ffa1fcef
- Update GetStarted.md · 5bd895c4
  dwf1m12 authored 3 years ago
  
  5bd895c4
- add initial GetStarted doc · 1b89ae04
  dwf1m12 authored 3 years ago
  
  1b89ae04
- update build from DesignStart Pro to full AAA IP bundles · 2589e336
  dwf1m12 authored 3 years ago
  
  2589e336
- Initial commit · b99de5a2
  dwf1m12 authored 3 years ago
  
  b99de5a2