Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
C
Can
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Minyong Li
Can
Commits
585b1228
Verified
Commit
585b1228
authored
3 years ago
by
Minyong Li
Browse files
Options
Downloads
Patches
Plain Diff
core.{Data,Program}Memory: add read enable signal
parent
6b278e2c
No related branches found
No related tags found
No related merge requests found
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
+4
-1
4 additions, 1 deletion
src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
+4
-1
4 additions, 1 deletion
src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
with
8 additions
and
2 deletions
Loading
Minyong Li
@ml10g20
mentioned in commit
1325f446
·
3 years ago
mentioned in commit
1325f446
mentioned in commit 1325f446041f859bc0e1b0cefc91da8576365ce0
Toggle commit list
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment