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Minyong Li
Can
Commits
1325f446
Verified
Commit
1325f446
authored
Jul 11, 2021
by
Minyong Li
💬
Browse files
MemoryReadIO: remove read enable
This reverts
585b1228
.
parent
41900e5b
Changes
3
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Side-by-side
src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
View file @
1325f446
...
...
@@ -20,9 +20,7 @@ class DataMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
else
Mem
(
cfg
.
dataMemoryWords
,
UInt
(
512.
W
))
when
(
read
.
en
)
{
read
.
data
:=
mem
(
read
.
addr
)
}
read
.
data
:=
mem
(
read
.
addr
)
when
(
write
.
en
)
{
mem
(
write
.
addr
)
:=
write
.
data
...
...
src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
View file @
1325f446
...
...
@@ -40,9 +40,7 @@ class ProgramMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
cw
:=
mem
(
pc
)
when
(
read
.
en
)
{
read
.
data
:=
mem
(
read
.
addr
)
}
read
.
data
:=
mem
(
read
.
addr
)
when
(
write
.
en
)
{
mem
(
write
.
addr
)
:=
write
.
data
...
...
src/main/scala/uk/ac/soton/ecs/can/types/MemoryReadIO.scala
View file @
1325f446
...
...
@@ -6,7 +6,6 @@ package uk.ac.soton.ecs.can.types
import
chisel3._
class
MemoryReadIO
(
addrWidth
:
Int
,
dataWidth
:
Int
)
extends
Bundle
{
val
en
=
Input
(
Bool
())
val
addr
=
Input
(
UInt
(
addrWidth
.
W
))
val
data
=
Output
(
UInt
(
dataWidth
.
W
))
}
Write
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