Cleanup simulation flow and Add start of ASIC flow
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- .gitignore 2 additions, 0 deletions.gitignore
- .gitmodules 3 additions, 0 deletions.gitmodules
- ASIC/TSMC28nm_HPCP/sram_32b_32k.spec 47 additions, 0 deletionsASIC/TSMC28nm_HPCP/sram_32b_32k.spec
- flist/IP/NIC400.flist 68 additions, 0 deletionsflist/IP/NIC400.flist
- flist/IP/SIE300.flist 24 additions, 0 deletionsflist/IP/SIE300.flist
- flist/IP/TLX400.flist 78 additions, 0 deletionsflist/IP/TLX400.flist
- flist/Top/sram_chiplet.flist 40 additions, 0 deletionsflist/Top/sram_chiplet.flist
- flist/Top/sram_chiplet_TSMC28nm.flist 39 additions, 0 deletionsflist/Top/sram_chiplet_TSMC28nm.flist
- flist/Top/sram_chiplet_vip.flist 5 additions, 0 deletionsflist/Top/sram_chiplet_vip.flist
- flist/VIP/NIC400_tb.flist 45 additions, 0 deletionsflist/VIP/NIC400_tb.flist
- flist/sram_chiplet_cocotb.flist 0 additions, 231 deletionsflist/sram_chiplet_cocotb.flist
- flows/makefile.asic 29 additions, 0 deletionsflows/makefile.asic
- flows/makefile.simulate 55 additions, 0 deletionsflows/makefile.simulate
- logical/SRAM/TSMC28nm_hpcp/verilog/SRAM.v 134 additions, 0 deletionslogical/SRAM/TSMC28nm_hpcp/verilog/SRAM.v
- logical/SRAM/TSMC28nm_hpcp/verilog/SRAM_wrapper.v 0 additions, 0 deletionslogical/SRAM/TSMC28nm_hpcp/verilog/SRAM_wrapper.v
- logical/SRAM/glib/verilog/SRAM.v 1 addition, 1 deletionlogical/SRAM/glib/verilog/SRAM.v
- logical/SRAM/glib/verilog/SRAM_wrapper.v 153 additions, 0 deletionslogical/SRAM/glib/verilog/SRAM_wrapper.v
- logical/interfaces/tlx_interfaces.sv 8 additions, 0 deletionslogical/interfaces/tlx_interfaces.sv
- logical/top_sram_chiplet/verilog/top_sram_chiplet.sv 221 additions, 80 deletionslogical/top_sram_chiplet/verilog/top_sram_chiplet.sv
- makefile 30 additions, 0 deletionsmakefile
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