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Minyong Li
Can
Commits
d7827bd8
Verified
Commit
d7827bd8
authored
3 years ago
by
Minyong Li
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core.*Memory: add mem load for simulation
parent
b57e4b57
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src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
+3
-0
3 additions, 0 deletions
src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
+3
-0
3 additions, 0 deletions
src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
with
6 additions
and
0 deletions
src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
+
3
−
0
View file @
d7827bd8
...
@@ -5,6 +5,7 @@ package uk.ac.soton.ecs.can.core
...
@@ -5,6 +5,7 @@ package uk.ac.soton.ecs.can.core
import
chisel3._
import
chisel3._
import
chisel3.util.log2Ceil
import
chisel3.util.log2Ceil
import
chisel3.util.experimental.loadMemoryFromFile
import
uk.ac.soton.ecs.can.types._
import
uk.ac.soton.ecs.can.types._
import
uk.ac.soton.ecs.can.config.CanCoreConfiguration
import
uk.ac.soton.ecs.can.config.CanCoreConfiguration
...
@@ -25,4 +26,6 @@ class DataMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
...
@@ -25,4 +26,6 @@ class DataMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
when
(
write
.
en
)
{
when
(
write
.
en
)
{
mem
(
write
.
addr
)
:=
write
.
data
mem
(
write
.
addr
)
:=
write
.
data
}
}
loadMemoryFromFile
(
mem
,
"firmware/test/test.data.hex"
)
}
}
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src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
+
3
−
0
View file @
d7827bd8
...
@@ -5,6 +5,7 @@ package uk.ac.soton.ecs.can.core
...
@@ -5,6 +5,7 @@ package uk.ac.soton.ecs.can.core
import
chisel3._
import
chisel3._
import
chisel3.util.log2Ceil
import
chisel3.util.log2Ceil
import
chisel3.util.experimental.loadMemoryFromFile
import
uk.ac.soton.ecs.can.config.CanCoreConfiguration
import
uk.ac.soton.ecs.can.config.CanCoreConfiguration
import
uk.ac.soton.ecs.can.types._
import
uk.ac.soton.ecs.can.types._
...
@@ -36,4 +37,6 @@ class ProgramMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
...
@@ -36,4 +37,6 @@ class ProgramMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
when
(
write
.
en
)
{
when
(
write
.
en
)
{
mem
(
write
.
addr
)
:=
write
.
data
mem
(
write
.
addr
)
:=
write
.
data
}
}
loadMemoryFromFile
(
mem
,
"firmware/test/test.prog.hex"
)
}
}
This diff is collapsed.
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Minyong Li
@ml10g20
mentioned in commit
ac7c2585
·
3 years ago
mentioned in commit
ac7c2585
mentioned in commit ac7c25857520dc203095ee850fe958626557926d
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