core.*Memory: add mem load for simulation

src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala

@@ -5,6 +5,7 @@ package uk.ac.soton.ecs.can.core
 
 import chisel3._
 import chisel3.util.log2Ceil
+import chisel3.util.experimental.loadMemoryFromFile
 import uk.ac.soton.ecs.can.types._
 import uk.ac.soton.ecs.can.config.CanCoreConfiguration
 
@@ -25,4 +26,6 @@ class DataMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
   when(write.en) {
     mem(write.addr) := write.data
   }
+
+  loadMemoryFromFile(mem, "firmware/test/test.data.hex")
 }

src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala

@@ -5,6 +5,7 @@ package uk.ac.soton.ecs.can.core
 
 import chisel3._
 import chisel3.util.log2Ceil
+import chisel3.util.experimental.loadMemoryFromFile
 import uk.ac.soton.ecs.can.config.CanCoreConfiguration
 import uk.ac.soton.ecs.can.types._
 
@@ -36,4 +37,6 @@ class ProgramMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
   when(write.en) {
     mem(write.addr) := write.data
   }
+
+  loadMemoryFromFile(mem, "firmware/test/test.prog.hex")
 }