Update address ranges and fix byte writes and reads
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- logical/SRAM/verilog/SRAM.v 1 addition, 1 deletionlogical/SRAM/verilog/SRAM.v
- makefile 7 additions, 2 deletionsmakefile
- socrates/nic400_sram_chiplet/nic400_sram_chiplet.xml 11 additions, 11 deletionssocrates/nic400_sram_chiplet/nic400_sram_chiplet.xml
- socrates/nic400_tlx_sram_chiplet/nic400_tlx_sram_chiplet.xml 2 additions, 203 deletionssocrates/nic400_tlx_sram_chiplet/nic400_tlx_sram_chiplet.xml
- verif/cocotb/sram_chiplet_tests.py 23 additions, 2 deletionsverif/cocotb/sram_chiplet_tests.py
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