Update ASIC flow, make SRAM 1MB, add clocks for asynchronous interfaces
Showing
- .gitignore 3 additions, 1 deletion.gitignore
- ASIC/TSMC28nm_HPCP/Synopsys_FC_flow/FC_flow.tcl 45 additions, 9 deletionsASIC/TSMC28nm_HPCP/Synopsys_FC_flow/FC_flow.tcl
- ASIC/TSMC28nm_HPCP/Synopsys_FC_flow/design_setup.tcl 1 addition, 1 deletionASIC/TSMC28nm_HPCP/Synopsys_FC_flow/design_setup.tcl
- ASIC/TSMC28nm_HPCP/Synopsys_FC_flow/floorplan/floorplan.def 2 additions, 2 deletionsASIC/TSMC28nm_HPCP/Synopsys_FC_flow/floorplan/floorplan.def
- ASIC/TSMC28nm_HPCP/Synopsys_FC_flow/floorplan/floorplan.tcl 1 addition, 1 deletionASIC/TSMC28nm_HPCP/Synopsys_FC_flow/floorplan/floorplan.tcl
- ASIC/TSMC28nm_HPCP/Synopsys_FC_flow/floorplan/floorplan_compare_data.txt 102 additions, 101 deletions...PCP/Synopsys_FC_flow/floorplan/floorplan_compare_data.txt
- ASIC/TSMC28nm_HPCP/Synopsys_FC_flow/floorplan/fp.tcl 20 additions, 20 deletionsASIC/TSMC28nm_HPCP/Synopsys_FC_flow/floorplan/fp.tcl
- ASIC/TSMC28nm_HPCP/Synopsys_FC_flow/init_placement.tcl 3 additions, 1 deletionASIC/TSMC28nm_HPCP/Synopsys_FC_flow/init_placement.tcl
- ASIC/TSMC28nm_HPCP/Synopsys_FC_flow/synopsys_lib_conversion.tcl 62 additions, 7 deletions...SMC28nm_HPCP/Synopsys_FC_flow/synopsys_lib_conversion.tcl
- ASIC/TSMC28nm_HPCP/constraints/sram_chiplet.sdc 17 additions, 6 deletionsASIC/TSMC28nm_HPCP/constraints/sram_chiplet.sdc
- flist/IP/NIC400.flist 43 additions, 5 deletionsflist/IP/NIC400.flist
- flist/Top/sram_chiplet.flist 1 addition, 0 deletionsflist/Top/sram_chiplet.flist
- flist/Top/sram_chiplet_TSMC28nm.flist 1 addition, 0 deletionsflist/Top/sram_chiplet_TSMC28nm.flist
- flist/Top/sram_chiplet_TSMC28nm_ASIC.flist 1 addition, 0 deletionsflist/Top/sram_chiplet_TSMC28nm_ASIC.flist
- flist/Top/sram_chiplet_vip.flist 3 additions, 1 deletionflist/Top/sram_chiplet_vip.flist
- logical/SRAM/TSMC28nm_hpcp/verilog/SRAM.v 23 additions, 6 deletionslogical/SRAM/TSMC28nm_hpcp/verilog/SRAM.v
- logical/SRAM/TSMC28nm_hpcp/verilog/SRAM_wrapper.v 3 additions, 3 deletionslogical/SRAM/TSMC28nm_hpcp/verilog/SRAM_wrapper.v
- logical/SRAM/glib/verilog/SRAM.v 6 additions, 6 deletionslogical/SRAM/glib/verilog/SRAM.v
- logical/SRAM/glib/verilog/SRAM_wrapper.v 3 additions, 3 deletionslogical/SRAM/glib/verilog/SRAM_wrapper.v
- logical/sram_chiplet_apb_subsystem/verilog/sram_chiplet_apb_subsystem.v 53 additions, 7 deletions...hiplet_apb_subsystem/verilog/sram_chiplet_apb_subsystem.v
Loading
Please register or sign in to comment