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SoCLabs
NanoSoC Tech
Commits
Commits · 6e8c794f6011058304f459f5c1e88c7d0804fa23
6e8c794f6011058304f459f5c1e88c7d0804fa23
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6e8c794f6011058304f459f5c1e88c7d0804fa23
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10
main
default
protected
feat_dma230_dataio
feat_qspi_rom
feat_extio
feat_dmax4
feat_dma350
feat_nanosoc_regions
feat_accel_decouple
dev
feat_accel_hash_stream
Tags
1
nanosoc-2023
12 results
nanosoc_tech
system
nanosoc_subsystems
systemctrl
verilog
nanosoc_ss_systemctrl.v
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authors
dam1n19
dam1n19
dwf1m12
dwf1m12
dwn1c21
dwn1c21
eb3u21
eb3u21
hhp1n22
hhp1n22
John Darlington
JohnD
6 authors
Browse files
Jun 20, 2023
Wired Chip Level and made changes
· 6e8c794f
dam1n19
authored
2 years ago
6e8c794f
Jun 19, 2023
Initial system-level wiring
· 9959a7d1
dam1n19
authored
2 years ago
9959a7d1
Jun 16, 2023
SOC1-230
: Fixed my surname and updated interconnect subsystem
· d5a2acbb
dam1n19
authored
2 years ago
d5a2acbb
SOC1-230
: Added clock control and pin mux to systemctrl subsystem
· b1f0b4bd
dam1n19
authored
2 years ago
b1f0b4bd
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