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Commit 8d31f4ae authored by dam1n19's avatar dam1n19
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SOC10167: Added NANSOC_EXPANSION_REGION define to nanosoc_chip to get building...

SOC10167: Added NANSOC_EXPANSION_REGION define to nanosoc_chip to get building with an expansion region
parent 5338dd09
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......@@ -57,7 +57,6 @@ source scripts/rtl_source_soclabs_ip.tcl
#source scripts/rtl_source_fpga_ip.tcl
# soclabs modified mcu system
set_property verilog_define {NOEXP} [current_fileset]
set soc_vlog ../src
read_verilog $soc_vlog/nanosoc_ahb_busmatrix/verilog/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_default_slave.v
......
......@@ -81,9 +81,15 @@ BOOTROM_HEX ?= $(NANOSOC_TECH_DIR)/system/testcodes/bootloader/$(BOOTLOADE
BOOTROM_BUILD_DIR ?= $(PROJ_SYS_DIR)/bootrom
NANSOC_EXPANSION_REGION ?= yes
# Simulator Defines
DEFINES_VC += $(MEM_INIT) +define+CORTEX_M0 +define+USE_TARMAC
ifeq ($(NANSOC_EXPANSION_REGION),yes)
DEFINES_VC += +define+NANSOC_EXPANSION_REGION
endif
# Simulator Command file to specify RTL source files
TBENCH_VC ?= -f $(PROJECT_DIR)/flist/project/system.flist
......@@ -94,6 +100,7 @@ SIMULATOR = xm
# Directory to put simulation files
SIM_DIR ?=
ifeq ($(SIM_DIR),)
# Defaultly put simulation files in simulation directory with c code testname
SIM_DIR = $(PROJECT_DIR)/simulate/sim/$(TESTNAME)
......
......@@ -841,7 +841,7 @@ localparam CORTEX_M0 = 1;
// Expansion Region "exp" instance
//----------------------------------------
`ifdef NOEXP
`ifdef NANSOC_EXPANSION_REGION
nanosoc_exp #(.ADDRWIDTH(29)
) u_nanosoc_exp (
.HCLK (HCLK),
......
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