From 8d31f4ae6fc6a942fed559504053b4f6c3056d84 Mon Sep 17 00:00:00 2001 From: dam1n19 <dam1n19@soton.ac.uk> Date: Tue, 2 May 2023 11:31:29 +0100 Subject: [PATCH] SOC10167: Added NANSOC_EXPANSION_REGION define to nanosoc_chip to get building with an expansion region --- system/fpga_imp/scripts/build_mcu_fpga_ip.tcl | 1 - system/makefile | 7 +++++++ system/src/verilog/nanosoc_chip.v | 2 +- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/system/fpga_imp/scripts/build_mcu_fpga_ip.tcl b/system/fpga_imp/scripts/build_mcu_fpga_ip.tcl index 5014940..f319e99 100644 --- a/system/fpga_imp/scripts/build_mcu_fpga_ip.tcl +++ b/system/fpga_imp/scripts/build_mcu_fpga_ip.tcl @@ -57,7 +57,6 @@ source scripts/rtl_source_soclabs_ip.tcl #source scripts/rtl_source_fpga_ip.tcl # soclabs modified mcu system -set_property verilog_define {NOEXP} [current_fileset] set soc_vlog ../src read_verilog $soc_vlog/nanosoc_ahb_busmatrix/verilog/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_default_slave.v diff --git a/system/makefile b/system/makefile index a2e8dfa..28313d8 100644 --- a/system/makefile +++ b/system/makefile @@ -81,9 +81,15 @@ BOOTROM_HEX ?= $(NANOSOC_TECH_DIR)/system/testcodes/bootloader/$(BOOTLOADE BOOTROM_BUILD_DIR ?= $(PROJ_SYS_DIR)/bootrom +NANSOC_EXPANSION_REGION ?= yes + # Simulator Defines DEFINES_VC += $(MEM_INIT) +define+CORTEX_M0 +define+USE_TARMAC +ifeq ($(NANSOC_EXPANSION_REGION),yes) + DEFINES_VC += +define+NANSOC_EXPANSION_REGION +endif + # Simulator Command file to specify RTL source files TBENCH_VC ?= -f $(PROJECT_DIR)/flist/project/system.flist @@ -94,6 +100,7 @@ SIMULATOR = xm # Directory to put simulation files SIM_DIR ?= + ifeq ($(SIM_DIR),) # Defaultly put simulation files in simulation directory with c code testname SIM_DIR = $(PROJECT_DIR)/simulate/sim/$(TESTNAME) diff --git a/system/src/verilog/nanosoc_chip.v b/system/src/verilog/nanosoc_chip.v index b8012b5..52f2a91 100644 --- a/system/src/verilog/nanosoc_chip.v +++ b/system/src/verilog/nanosoc_chip.v @@ -841,7 +841,7 @@ localparam CORTEX_M0 = 1; // Expansion Region "exp" instance //---------------------------------------- -`ifdef NOEXP +`ifdef NANSOC_EXPANSION_REGION nanosoc_exp #(.ADDRWIDTH(29) ) u_nanosoc_exp ( .HCLK (HCLK), -- GitLab