Fixed lint errors in nanosoc

nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v

@@ -73,13 +73,14 @@ module nanosoc_sysio_decode #(
   // Peripheral Selection decode logic
   // ----------------------------------------------------------
 
-  assign apbsys_hsel  = hsel & (haddr[31:16]==16'h4000); // 0x40000000
+  assign apbsys_hsel  = hsel & (haddr[31:16]==
+                        BASEADDR_APBSS[31:16]);   // 0x40000000
   assign gpio0_hsel   = hsel & (haddr[31:12]==
-                         BASEADDR_GPIO0[31:12]);       // 0x40010000
+                        BASEADDR_GPIO0[31:12]);   // 0x40010000
   assign gpio1_hsel   = hsel & (haddr[31:12]==
-                         BASEADDR_GPIO1[31:12]);       // 0x40011000
+                        BASEADDR_GPIO1[31:12]);   // 0x40011000
   assign sysctrl_hsel = hsel & (haddr[31:12]==
-                         BASEADDR_SYSCTRL[31:12]);     // 0x4001F000
+                        BASEADDR_SYSCTRL[31:12]); // 0x4001F000
 
   // ----------------------------------------------------------
   // Default slave decode logic

nanosoc/nanosoc_system/verilog/nanosoc_system.v

@@ -128,7 +128,6 @@ module nanosoc_system #(
 
     // System Reset Request Signals
     wire          SYS_SYSRESETREQ;       // System Request from System Managers
-    wire          SYS_PRMURESETREQ;      // CPU Control Reset Request (PMU and Reset Unit)
         
     // AHB Clocks and Resets 
     wire          SYS_PORESETn;          // System Power On Reset