From 274432fb20b508be86bf92f345a66351871f7e50 Mon Sep 17 00:00:00 2001
From: dam1n19 <dam1n19@soton.ac.uk>
Date: Sat, 1 Jul 2023 13:19:19 +0100
Subject: [PATCH] Fixed lint errors in nanosoc

---
 .../nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v | 9 +++++----
 nanosoc/nanosoc_system/verilog/nanosoc_system.v          | 1 -
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v b/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v
index dc30f11..e17ffc5 100644
--- a/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v
+++ b/nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v
@@ -73,13 +73,14 @@ module nanosoc_sysio_decode #(
   // Peripheral Selection decode logic
   // ----------------------------------------------------------
 
-  assign apbsys_hsel  = hsel & (haddr[31:16]==16'h4000); // 0x40000000
+  assign apbsys_hsel  = hsel & (haddr[31:16]==
+                        BASEADDR_APBSS[31:16]);   // 0x40000000
   assign gpio0_hsel   = hsel & (haddr[31:12]==
-                         BASEADDR_GPIO0[31:12]);       // 0x40010000
+                        BASEADDR_GPIO0[31:12]);   // 0x40010000
   assign gpio1_hsel   = hsel & (haddr[31:12]==
-                         BASEADDR_GPIO1[31:12]);       // 0x40011000
+                        BASEADDR_GPIO1[31:12]);   // 0x40011000
   assign sysctrl_hsel = hsel & (haddr[31:12]==
-                         BASEADDR_SYSCTRL[31:12]);     // 0x4001F000
+                        BASEADDR_SYSCTRL[31:12]); // 0x4001F000
 
   // ----------------------------------------------------------
   // Default slave decode logic
diff --git a/nanosoc/nanosoc_system/verilog/nanosoc_system.v b/nanosoc/nanosoc_system/verilog/nanosoc_system.v
index 0af026c..0b8d22f 100644
--- a/nanosoc/nanosoc_system/verilog/nanosoc_system.v
+++ b/nanosoc/nanosoc_system/verilog/nanosoc_system.v
@@ -128,7 +128,6 @@ module nanosoc_system #(
 
     // System Reset Request Signals
     wire          SYS_SYSRESETREQ;       // System Request from System Managers
-    wire          SYS_PRMURESETREQ;      // CPU Control Reset Request (PMU and Reset Unit)
         
     // AHB Clocks and Resets 
     wire          SYS_PORESETn;          // System Power On Reset
-- 
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