Repair flist files to get aes-128 project building and running correctly again

flist/project/accelerator.flist

@@ -14,10 +14,10 @@
 // =============    Accelerator Module search path    =============
 
 // ! Point this to your Accelerator RTL
-//+incdir+$(ACCELERATOR_DIR)/src/rtl
++incdir+$(ACCELERATOR_DIR)/src/rtl
 
 // ! Point this to your Wrapper RTL
-///$(SOCLABS_PROJECT_DIR)/wrapper/src/soclabs_ahb_aes128_ctrl.v
+$(SOCLABS_PROJECT_DIR)/wrapper/src/soclabs_ahb_aes128_ctrl.v
 
 // ! Point this to your Subsystem RTL
-///$(SOCLABS_PROJECT_DIR)/system/src/accelerator_subsystem.v
+$(SOCLABS_PROJECT_DIR)/system/src/accelerator_subsystem.v

flist/project/system.flist

@@ -29,7 +29,7 @@
 -f $(SOCLABS_FPGA_LIB_TECH_DIR)/flist/fpga_lib_mem_ip.flist
 
 // - Accelerator Wrapper IP
--f $(SOCLABS_WRAPPER_TECH_DIR)/flist/accelerator_wrapper_ip.flist
+///-f $(SOCLABS_WRAPPER_TECH_DIR)/flist/accelerator_wrapper_ip.flist
 
 // - Bootrom Code RTL
-$(SOCLABS_PROJECT_DIR)/system/src/bootrom/verilog/bootrom.v
+$(SOCLABS_PROJECT_DIR)/system/src/bootrom/verilog/bootrom.v
\ No newline at end of file