firmware/test: add program and data for demo

firmware/test/test.data.hex

+// Data for demonstration
+//
+// SPDX-FileCopyrightText: 2021 Minyong Li <ml10g20@soton.ac.uk>
+// SPDX-License-Identifier: CC0-1.0
+
+// Block 0 (initial state, constant to be filled)
+0
+
+// Block 1 (plain text)
+0

firmware/test/test.prog.hex

+// A simple Control Word (CW) program running the ChaCha20 block function for
+// demonstration
+//
+// SPDX-FileCopyrightText: 2021 Minyong Li <ml10g20@soton.ac.uk>
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+// Can Architecture Variant: Mem(Sync-P128-D16)-Reg(2)
+// -> PM ADDR W 7b - DM ADDR W 4b
+//
+//                   /- rwf
+//        /- dmwe    | /- rwe
+// /- hlt | /- dmwa  | | /- rwa
+// 0_0000_0_0000_0_0_0_0_0_0_0_000
+//   \- dmra     | \- r1ra | | \- aluf
+//               \- r0ra   | \- incblkcnt
+//                         \- flcnst
+//
+// 0000_0000_0000_0000_0000 (20.W)
+// 0_0000_0_0000_0_0_0_0_0_0_0_000 //
+
+      // |    |     |      |       |
+00000 // 0_0000_0_0000_0_0_0_0_0_0_0_000 // %0 <- #0
+000c0 // 0_0000_0_0000_0_0_1_1_0_0_0_000 // %0 <- #0 // Delayed load
+00051 // 0_0000_0_0000_0_0_0_1_0_1_0_001 // %0 <- ! %0
+00066 // 0_0000_0_0000_0_0_0_1_1_0_0_110 // %1 <- %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+00042 // 0_0000_0_0000_0_0_0_1_0_0_0_010 // %0 <- | %0
+00043 // 0_0000_0_0000_0_0_0_1_0_0_0_011 // %0 <- \ %0
+08144 // 0_0000_0_0000_0_1_0_1_0_0_0_100 // %0 <- %0 + %1
+08000 // 0_0001_0_0000_0_0_0_0_0_0_0_000 // %1 <- #1
+080e0 // 0_0001_0_0000_0_0_1_1_1_0_0_000 // %1 <- #1 // Delayed load
+04505 // 0_0000_0_0000_0_1_0_1_1_0_0_101 // %1 <- %0 ^ %1
+04507 // 0_0000_1_0001_0_1_0_0_0_0_0_111 // #1 <- %1
+80000 // 1_0000_0_0000_0_0_0_0_0_0_0_000 // Halt