fpga/de1-soc/CanCore.qsf: update project settings

fpga/de1-soc/CanCore.qsf

@@ -75,4 +75,10 @@ set_instance_assignment -name VIRTUAL_PIN ON -to io_programMemory_write_data
 set_location_assignment PIN_AF14 -to clock
 set_global_assignment -name SDC_FILE CanCore.sdc
 set_global_assignment -name VERILOG_FILE ../../CanCore.v
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
+set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation
+set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH CanCoreTest -section_id eda_simulation
+set_global_assignment -name EDA_TEST_BENCH_NAME CanCoreTest -section_id eda_simulation
+set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id CanCoreTest
+set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME CanCoreTest -section_id CanCoreTest
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_global_assignment -name EDA_TEST_BENCH_FILE ../../testbench/CanCore.tb.v -section_id CanCoreTest
\ No newline at end of file