fpga/de1-soc/CanCore.sdc: comment out io constraints

94cd5de7 · Minyong Li · 860bcc74 · 94cd5de7
Verified Commit 94cd5de7 authored Aug 23, 2021 by Minyong Li 💬
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fpga/de1-soc/CanCore.sdc fpga/de1-soc/CanCore.sdc +3 -1

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--- a/fpga/de1-soc/CanCore.sdc
+++ b/fpga/de1-soc/CanCore.sdc
@@ -3,4 +3,6 @@
 # SPDX-License-Identifier: CC0-1.0

 create_clock -name CLK_50MHz -period 20 [get_ports {clock}]
-set_false_path -from [get_ports {io_*}] -to [get_ports {io_*}]
+
+# IO ports are currently set to virtual pins and cannot be constrained
+# set_false_path -from [get_ports {io_*}] -to [get_ports {io_*}]