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Commit d739e768 authored by dam1n19's avatar dam1n19
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Changed Incdir syntax in filelists

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flist/cortexm0_ip.flist
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...@@ -16,12 +16,12 @@ ...@@ -16,12 +16,12 @@
+libext+.v+.vlib +libext+.v+.vlib
// ============= Accelerator Module search path ============= // ============= Accelerator Module search path =============
+incdir+$(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/cortexm0/verilog -incdir $(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/cortexm0/verilog
+incdir+$(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/cortexm0_dap/verilog -incdir $(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/cortexm0_dap/verilog
+incdir+$(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/cortexm0_integration/verilog -incdir $(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/cortexm0_integration/verilog
+incdir+$(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/models/cells -incdir $(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/models/cells
+incdir+$(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/models/wrappers -incdir $(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/models/wrappers
+incdir+$(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/ualdis/verilog -incdir $(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/ualdis/verilog
// Cortex-M0 Core IP // Cortex-M0 Core IP
// -y $(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/cortexm0/verilog // -y $(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/cortexm0/verilog
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