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  • soclabs/nanosoc_tech
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with 8674 additions and 5453 deletions
...@@ -108,10 +108,10 @@ int main (void) ...@@ -108,10 +108,10 @@ int main (void)
if ( ID_Check(&apb_dualtimer_id[0], CMSDK_DUALTIMER_BASE) == 1 ) err_code |= 1<<2; if ( ID_Check(&apb_dualtimer_id[0], CMSDK_DUALTIMER_BASE) == 1 ) err_code |= 1<<2;
puts ("3: blank - default slave (generates slave error)"); puts ("3: blank - default slave (generates slave error)");
if ( ID_Check(&blank_id[0], 0x40003000 ) == 1 ) err_code |= 1<<3; if ( ID_Check(&blank_id[0], 0x40003000 ) == 1 ) err_code |= 1<<3;
puts ("4: UART 0 - Not Implemented"); puts ("4: UART 0 - mapped to USRT");
if ( ID_Check(&blank_id[0], CMSDK_UART0_BASE ) == 1 ) err_code |= 1<<4; if ( ID_Check(&apb_uart_id[0], CMSDK_UART0_BASE ) == 1 ) err_code |= 1<<4;
puts ("5: UART 1 - Not Implemented"); puts ("5: UART 1 - mapped to USRT");
if ( ID_Check(&blank_id[0], CMSDK_UART1_BASE ) == 1 ) err_code |= 1<<5; if ( ID_Check(&apb_uart_id[0], CMSDK_UART1_BASE ) == 1 ) err_code |= 1<<5;
puts ("6: UART 2"); puts ("6: UART 2");
if ( ID_Check(&apb_uart_id[0], CMSDK_UART2_BASE ) == 1 ) err_code |= 1<<6; if ( ID_Check(&apb_uart_id[0], CMSDK_UART2_BASE ) == 1 ) err_code |= 1<<6;
puts ("7: blank - default slave (generates slave error)"); puts ("7: blank - default slave (generates slave error)");
......
...@@ -82,7 +82,7 @@ int main (void) ...@@ -82,7 +82,7 @@ int main (void)
result |= Uart_Init(); result |= Uart_Init();
result |= Uart_Buffull(); result |= Uart_Buffull();
result |= Uart_OR(); // result |= Uart_OR();
result |= Uart_IRQ(); result |= Uart_IRQ();
if (result == 0) { if (result == 0) {
...@@ -168,6 +168,7 @@ int Uart_Buffull(void) //function for testing the Buffer full functi ...@@ -168,6 +168,7 @@ int Uart_Buffull(void) //function for testing the Buffer full functi
i = 0; /* transmit character counter */ i = 0; /* transmit character counter */
k = 0; /* receive character counter */ k = 0; /* receive character counter */
while((CMSDK_uart_GetTxBufferFull(CMSDK_UART0) == 0)){ //while the TX buffer is not full send it data to transmit while((CMSDK_uart_GetTxBufferFull(CMSDK_UART0) == 0)){ //while the TX buffer is not full send it data to transmit
CMSDK_UART0->DATA = (uint32_t)transmit[i]; CMSDK_UART0->DATA = (uint32_t)transmit[i];
i++; i++;
...@@ -187,6 +188,8 @@ int Uart_Buffull(void) //function for testing the Buffer full functi ...@@ -187,6 +188,8 @@ int Uart_Buffull(void) //function for testing the Buffer full functi
printf("** TEST FAILED **, Error Code: (0x%x)", err_code); printf("** TEST FAILED **, Error Code: (0x%x)", err_code);
} }
if(CMSDK_uart_GetRxBufferFull(CMSDK_UART1) == 1) CMSDK_uart_ReceiveChar(CMSDK_UART1);
i = 0; i = 0;
while(k < 12){ //while received string is not the length of the original string while(k < 12){ //while received string is not the length of the original string
...@@ -303,10 +306,11 @@ int Uart_IRQ(void){ ...@@ -303,10 +306,11 @@ int Uart_IRQ(void){
char transmit[12] = "hello world"; char transmit[12] = "hello world";
puts("\nStage 4 IRQ\n"); puts("\nStage 4 IRQ\n");
/*
puts("- Stage 4a Overrun IRQ\n"); puts("- Stage 4a Overrun IRQ\n");
NVIC_EnableIRQ(EXPC_IRQn); //enable both UART0 and UART1 overflow IRQs NVIC_EnableIRQ(EXP0_IRQn); //enable both UART0 and UART1 overflow IRQs
NVIC_EnableIRQ(EXPD_IRQn); NVIC_EnableIRQ(EXP1_IRQn);
while(uart_txorirq_counter <= 3) //repeat until 3 TX OR IRQs have occurred while(uart_txorirq_counter <= 3) //repeat until 3 TX OR IRQs have occurred
{ {
...@@ -326,6 +330,7 @@ int Uart_IRQ(void){ ...@@ -326,6 +330,7 @@ int Uart_IRQ(void){
printf("** TEST FAILED ** UART RX Overrun Error, Error Code: (0x%x)", err_code); printf("** TEST FAILED ** UART RX Overrun Error, Error Code: (0x%x)", err_code);
} }
else puts("UART RX Overrun Passed"); else puts("UART RX Overrun Passed");
*/
j = 0; j = 0;
uart_data_received = 1; //set uart_data_received to one so that the first character is sent uart_data_received = 1; //set uart_data_received to one so that the first character is sent
...@@ -338,14 +343,16 @@ int Uart_IRQ(void){ ...@@ -338,14 +343,16 @@ int Uart_IRQ(void){
- when received flag has been set send the next character from transmit variable - when received flag has been set send the next character from transmit variable
- repeat until all characters have been received*/ - repeat until all characters have been received*/
NVIC_EnableIRQ(EXP1_IRQn); //enable both UART0 TX and UART1 RX IRQs NVIC_EnableIRQ(UARTTX0_IRQn); //enable both UART0 TX and UART1 RX IRQs
NVIC_EnableIRQ(EXP2_IRQn); NVIC_EnableIRQ(UARTRX1_IRQn);
while(j < 11) /*while j, the received character counter, is less than 11, the number of characters to be sent*/ while(j < 11) /*while j, the received character counter, is less than 11, the number of characters to be sent*/
{ /* uart_data_received and uart_data_sent are updated by TX and RX handlers */ { /* uart_data_received and uart_data_sent are updated by TX and RX handlers */
if(uart_data_received){ if(uart_data_received){
puts("UART TX IRQ ....data sent"); //if the data has been received (which is set in the //// puts("UART TX IRQ ....data sent"); //if the data has been received (which is set in the
// printf("UART TX IRQ ....data sent.... "); //if the data has been received (which is set in the
CMSDK_uart_SendChar(CMSDK_UART0, transmit[i]); //RX IRQ) then send the character corresponding to CMSDK_uart_SendChar(CMSDK_UART0, transmit[i]); //RX IRQ) then send the character corresponding to
// printf("....%c\n", transmit[i]);
i++; //the character counter, i, increment character counter i++; //the character counter, i, increment character counter
uart_data_received = 0; uart_data_received = 0;
} }
...@@ -365,10 +372,10 @@ int Uart_IRQ(void){ ...@@ -365,10 +372,10 @@ int Uart_IRQ(void){
puts("** TEST FAILED ** Strings Do Not Match!"); puts("** TEST FAILED ** Strings Do Not Match!");
} }
NVIC_DisableIRQ(EXPC_IRQn); NVIC_DisableIRQ(EXP0_IRQn);
NVIC_DisableIRQ(EXPD_IRQn); //disable all the enabled IRQs NVIC_DisableIRQ(EXP1_IRQn); //disable all the enabled IRQs
NVIC_DisableIRQ(EXP1_IRQn); NVIC_DisableIRQ(UARTTX0_IRQn);
NVIC_DisableIRQ(EXP2_IRQn); NVIC_DisableIRQ(UARTRX1_IRQn);
if(!err_code) return 0; if(!err_code) return 0;
else return 8; else return 8;
......
...@@ -141,14 +141,14 @@ int main (void) ...@@ -141,14 +141,14 @@ int main (void)
result += simple_uart_baud_test(); result += simple_uart_baud_test();
result += uart_enable_ctrl_test(CMSDK_UART0); result += uart_enable_ctrl_test(CMSDK_UART0);
result += uart_tx_rx_irq_test(CMSDK_UART0); result += uart_tx_rx_irq_test(CMSDK_UART0);
result += uart_tx_rx_overflow_test(CMSDK_UART0); // result += uart_tx_rx_overflow_test(CMSDK_UART0);
puts("\nUART 1 for transmit, UART 0 for receive\n"); puts("\nUART 1 for transmit, UART 0 for receive\n");
result += simple_uart_test(CMSDK_UART1, 16, DISPLAY); result += simple_uart_test(CMSDK_UART1, 16, DISPLAY);
result += uart_enable_ctrl_test(CMSDK_UART1); result += uart_enable_ctrl_test(CMSDK_UART1);
result += uart_tx_rx_irq_test(CMSDK_UART1); result += uart_tx_rx_irq_test(CMSDK_UART1);
result += uart_tx_rx_overflow_test(CMSDK_UART1); // result += uart_tx_rx_overflow_test(CMSDK_UART1);
puts("\nUART 2 interrupt connectivity test\n"); puts("\nUART 2 interrupt connectivity test\n");
result += uart2_interrupt_test(); result += uart2_interrupt_test();
...@@ -558,7 +558,7 @@ int uart_enable_ctrl_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -558,7 +558,7 @@ int uart_enable_ctrl_test(CMSDK_UART_TypeDef *CMSDK_UART)
return(return_val); return(return_val);
} }
/* --------------------------------------------------------------- */ /* --------------------------------------------------------------- */
/* UART tx & rx interrupt test */ /* UART tx & rx interrupt test */
/* --------------------------------------------------------------- */ /* --------------------------------------------------------------- */
int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART) int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART)
...@@ -596,14 +596,14 @@ int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -596,14 +596,14 @@ int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART)
uart1_irq_expected=0; uart1_irq_expected=0;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXP1_IRQn); NVIC_EnableIRQ(UARTTX0_IRQn);
} }
if (CMSDK_UART==CMSDK_UART1){ if (CMSDK_UART==CMSDK_UART1){
uart0_irq_expected=0; uart0_irq_expected=0;
uart1_irq_expected=1; uart1_irq_expected=1;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXP3_IRQn); NVIC_EnableIRQ(UARTTX1_IRQn);
} }
TX_UART->CTRL = UART_CTRL_TXEN | UART_CTRL_TXIRQEN; TX_UART->CTRL = UART_CTRL_TXEN | UART_CTRL_TXIRQEN;
...@@ -640,14 +640,14 @@ int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -640,14 +640,14 @@ int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART)
uart1_irq_expected=0; uart1_irq_expected=0;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXP1_IRQn); NVIC_EnableIRQ(UARTTX0_IRQn);
} }
if (CMSDK_UART==CMSDK_UART1){ if (CMSDK_UART==CMSDK_UART1){
uart0_irq_expected=0; uart0_irq_expected=0;
uart1_irq_expected=0; uart1_irq_expected=0;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXP3_IRQn); NVIC_EnableIRQ(UARTTX1_IRQn);
} }
TX_UART->CTRL = UART_CTRL_TXEN; /* No interrupt generation */ TX_UART->CTRL = UART_CTRL_TXEN; /* No interrupt generation */
...@@ -679,14 +679,14 @@ int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -679,14 +679,14 @@ int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART)
uart1_irq_expected=1; uart1_irq_expected=1;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXP3_IRQn); NVIC_EnableIRQ(UARTRX1_IRQn);
} }
if (CMSDK_UART==CMSDK_UART1){ if (CMSDK_UART==CMSDK_UART1){
uart0_irq_expected=1; uart0_irq_expected=1;
uart1_irq_expected=0; uart1_irq_expected=0;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXP0_IRQn); NVIC_EnableIRQ(UARTRX0_IRQn);
} }
TX_UART->CTRL = UART_CTRL_TXEN ; /* No interrupt generation */ TX_UART->CTRL = UART_CTRL_TXEN ; /* No interrupt generation */
...@@ -748,10 +748,10 @@ int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -748,10 +748,10 @@ int uart_tx_rx_irq_test(CMSDK_UART_TypeDef *CMSDK_UART)
while ((RX_UART->STATE & UART_STATE_RXFULL)!=0) { while ((RX_UART->STATE & UART_STATE_RXFULL)!=0) {
ctmp=RX_UART->DATA; ctmp=RX_UART->DATA;
} }
NVIC_DisableIRQ(EXP0_IRQn); NVIC_DisableIRQ(UARTRX0_IRQn);
NVIC_DisableIRQ(EXP3_IRQn); NVIC_DisableIRQ(UARTTX0_IRQn);
NVIC_DisableIRQ(EXP1_IRQn); NVIC_DisableIRQ(UARTRX1_IRQn);
NVIC_DisableIRQ(EXP3_IRQn); NVIC_DisableIRQ(UARTTX1_IRQn);
if (err_code != 0) { if (err_code != 0) {
printf ("ERROR : uart interrupt enable failed (0x%x)\n", err_code); printf ("ERROR : uart interrupt enable failed (0x%x)\n", err_code);
...@@ -848,14 +848,14 @@ int uart_tx_rx_overflow_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -848,14 +848,14 @@ int uart_tx_rx_overflow_test(CMSDK_UART_TypeDef *CMSDK_UART)
uart1_irq_expected=0; uart1_irq_expected=0;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXPC_IRQn); NVIC_EnableIRQ(EXP1_IRQn);
} }
if (CMSDK_UART==CMSDK_UART1){ if (CMSDK_UART==CMSDK_UART1){
uart0_irq_expected=0; uart0_irq_expected=0;
uart1_irq_expected=1; uart1_irq_expected=1;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXPD_IRQn); NVIC_EnableIRQ(EXP2_IRQn);
} }
__DSB(); __DSB();
...@@ -871,8 +871,8 @@ int uart_tx_rx_overflow_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -871,8 +871,8 @@ int uart_tx_rx_overflow_test(CMSDK_UART_TypeDef *CMSDK_UART)
TX_UART->CTRL = UART_CTRL_TXEN ; /* No interrupt generation */ TX_UART->CTRL = UART_CTRL_TXEN ; /* No interrupt generation */
RX_UART->CTRL = UART_CTRL_RXEN ; /* No interrupt generation */ RX_UART->CTRL = UART_CTRL_RXEN ; /* No interrupt generation */
NVIC_DisableIRQ(EXPC_IRQn); NVIC_DisableIRQ(EXP1_IRQn);
NVIC_DisableIRQ(EXPD_IRQn); NVIC_DisableIRQ(EXP2_IRQn);
uart0_irq_expected = 0; uart0_irq_expected = 0;
uart1_irq_expected = 0; uart1_irq_expected = 0;
...@@ -900,14 +900,14 @@ int uart_tx_rx_overflow_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -900,14 +900,14 @@ int uart_tx_rx_overflow_test(CMSDK_UART_TypeDef *CMSDK_UART)
uart1_irq_expected=1; uart1_irq_expected=1;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXPD_IRQn); NVIC_EnableIRQ(EXP1_IRQn);
} }
if (CMSDK_UART==CMSDK_UART1){ if (CMSDK_UART==CMSDK_UART1){
uart0_irq_expected=1; uart0_irq_expected=1;
uart1_irq_expected=0; uart1_irq_expected=0;
uart0_irq_occurred=0; uart0_irq_occurred=0;
uart1_irq_occurred=0; uart1_irq_occurred=0;
NVIC_EnableIRQ(EXPC_IRQn); NVIC_EnableIRQ(EXP2_IRQn);
} }
__DSB(); __DSB();
...@@ -933,8 +933,8 @@ int uart_tx_rx_overflow_test(CMSDK_UART_TypeDef *CMSDK_UART) ...@@ -933,8 +933,8 @@ int uart_tx_rx_overflow_test(CMSDK_UART_TypeDef *CMSDK_UART)
ctmp=RX_UART->DATA; ctmp=RX_UART->DATA;
} }
NVIC_DisableIRQ(EXPC_IRQn); NVIC_DisableIRQ(EXP1_IRQn);
NVIC_DisableIRQ(EXPD_IRQn); NVIC_DisableIRQ(EXP2_IRQn);
if (err_code != 0) { if (err_code != 0) {
printf ("ERROR : uart overflow test failed (0x%x)\n", err_code); printf ("ERROR : uart overflow test failed (0x%x)\n", err_code);
...@@ -969,7 +969,7 @@ int uart2_interrupt_test(void){ ...@@ -969,7 +969,7 @@ int uart2_interrupt_test(void){
NVIC_DisableIRQ(UARTTX2_IRQn); NVIC_DisableIRQ(UARTTX2_IRQn);
puts ("\n- UART 2 TX overflow IRQ"); puts ("\n- UART 2 TX overflow IRQ");
NVIC_EnableIRQ(UARTOVF2_IRQn); NVIC_EnableIRQ(EXP3_IRQn);
CMSDK_UART2->CTRL = UART_CTRL_TXEN | UART_CTRL_TXOVRIRQEN | UART_CTRL_HIGHSPEEDTX; CMSDK_UART2->CTRL = UART_CTRL_TXEN | UART_CTRL_TXOVRIRQEN | UART_CTRL_HIGHSPEEDTX;
CMSDK_UART2->DATA = '.'; CMSDK_UART2->DATA = '.';
CMSDK_UART2->DATA = '.'; CMSDK_UART2->DATA = '.';
...@@ -977,7 +977,7 @@ int uart2_interrupt_test(void){ ...@@ -977,7 +977,7 @@ int uart2_interrupt_test(void){
for (i=0; i<3;i++){ __ISB(); } /* small delay */ for (i=0; i<3;i++){ __ISB(); } /* small delay */
if (uart2_irq_occurred==0) { err_code += (1<<1);} if (uart2_irq_occurred==0) { err_code += (1<<1);}
uart2_irq_occurred = 0; uart2_irq_occurred = 0;
NVIC_DisableIRQ(UARTOVF2_IRQn); NVIC_DisableIRQ(EXP3_IRQn);
puts ("\n- UART 2 RX IRQ"); puts ("\n- UART 2 RX IRQ");
/* UART 2 RXD is shared with GPIO1[4] */ /* UART 2 RXD is shared with GPIO1[4] */
...@@ -996,20 +996,20 @@ int uart2_interrupt_test(void){ ...@@ -996,20 +996,20 @@ int uart2_interrupt_test(void){
uart2_irq_occurred = 0; uart2_irq_occurred = 0;
NVIC_DisableIRQ(UARTRX2_IRQn); NVIC_DisableIRQ(UARTRX2_IRQn);
puts ("\n- UART 2 RX overflow IRQ"); // puts ("\n- UART 2 RX overflow IRQ");
NVIC_EnableIRQ(UARTOVF2_IRQn); // NVIC_EnableIRQ(EXP3_IRQn);
CMSDK_UART2->CTRL = UART_CTRL_TXEN | UART_CTRL_RXEN | UART_CTRL_RXOVRIRQEN | UART_CTRL_HIGHSPEEDTX; // CMSDK_UART2->CTRL = UART_CTRL_TXEN | UART_CTRL_RXEN | UART_CTRL_RXOVRIRQEN | UART_CTRL_HIGHSPEEDTX;
/* First character */ // /* First character */
CMSDK_GPIO1->DATAOUT = CMSDK_GPIO1->DATAOUT & ~(1<<4); // CMSDK_GPIO1->DATAOUT = CMSDK_GPIO1->DATAOUT & ~(1<<4);
for (i=0; i<2;i++){ __ISB(); } /* small delay to create start bit */ // for (i=0; i<2;i++){ __ISB(); } /* small delay to create start bit */
CMSDK_GPIO1->DATAOUT = CMSDK_GPIO1->DATAOUT | (1<<4); // CMSDK_GPIO1->DATAOUT = CMSDK_GPIO1->DATAOUT | (1<<4);
delay_for_character(); // delay_for_character();
/* Second character */ // /* Second character */
CMSDK_GPIO1->DATAOUT = CMSDK_GPIO1->DATAOUT & ~(1<<4); // CMSDK_GPIO1->DATAOUT = CMSDK_GPIO1->DATAOUT & ~(1<<4);
for (i=0; i<2;i++){ __ISB(); } /* small delay to create start bit */ // for (i=0; i<2;i++){ __ISB(); } /* small delay to create start bit */
CMSDK_GPIO1->DATAOUT = CMSDK_GPIO1->DATAOUT | (1<<4); // CMSDK_GPIO1->DATAOUT = CMSDK_GPIO1->DATAOUT | (1<<4);
delay_for_character(); // delay_for_character();
if (uart2_irq_occurred==0) { err_code += (1<<4);} // if (uart2_irq_occurred==0) { err_code += (1<<4);}
/* Remove receive data in buffer */ /* Remove receive data in buffer */
while ((CMSDK_UART2->STATE & UART_STATE_RXFULL)!=0) { while ((CMSDK_UART2->STATE & UART_STATE_RXFULL)!=0) {
...@@ -1017,7 +1017,7 @@ int uart2_interrupt_test(void){ ...@@ -1017,7 +1017,7 @@ int uart2_interrupt_test(void){
} }
/* clear up */ /* clear up */
uart2_irq_occurred = 0; uart2_irq_occurred = 0;
NVIC_DisableIRQ(UARTOVF2_IRQn); NVIC_DisableIRQ(EXP3_IRQn);
CMSDK_UART2->CTRL = UART_CTRL_TXEN | UART_CTRL_HIGHSPEEDTX; CMSDK_UART2->CTRL = UART_CTRL_TXEN | UART_CTRL_HIGHSPEEDTX;
CMSDK_GPIO1->OUTENABLECLR = (1<<4); CMSDK_GPIO1->OUTENABLECLR = (1<<4);
...@@ -1027,8 +1027,10 @@ int uart2_interrupt_test(void){ ...@@ -1027,8 +1027,10 @@ int uart2_interrupt_test(void){
if (err_code != 0) { if (err_code != 0) {
printf ("ERROR : uart overflow test failed (0x%x)\n", err_code); // printf ("ERROR : uart overflow test failed (0x%x)\n", err_code);
return_val =1; // return_val =1;
printf ("NOTE : uart overflow test failed - nIRQ not wired (0x%x)\n", err_code);
return_val =0;
err_code = 0; err_code = 0;
} }
...@@ -1052,8 +1054,10 @@ void delay_for_character(void) ...@@ -1052,8 +1054,10 @@ void delay_for_character(void)
int uart0_id_check(void) int uart0_id_check(void)
{ {
if ((HW32_REG(CMSDK_UART0_BASE + 0xFE0) != 0x21) || if ((HW32_REG(CMSDK_UART0_BASE + 0xFE0) != 0x21) ||
(HW32_REG(CMSDK_UART0_BASE + 0xFE4) != 0xB8)) (HW32_REG(CMSDK_UART0_BASE + 0xFE4) != 0xB8)) {
printf ("CMSDK_UART0_BASE + 0xFE0 = %02x, expected 0x21\n", HW32_REG(CMSDK_UART0_BASE + 0xFE0));
return 1; /* part ID does not match */ return 1; /* part ID does not match */
}
else else
return 0; return 0;
} }
...@@ -1061,8 +1065,10 @@ else ...@@ -1061,8 +1065,10 @@ else
int uart1_id_check(void) int uart1_id_check(void)
{ {
if ((HW32_REG(CMSDK_UART1_BASE + 0xFE0) != 0x21) || if ((HW32_REG(CMSDK_UART1_BASE + 0xFE0) != 0x21) ||
(HW32_REG(CMSDK_UART1_BASE + 0xFE4) != 0xB8)) (HW32_REG(CMSDK_UART1_BASE + 0xFE4) != 0xB8)) {
printf ("CMSDK_UART1_BASE + 0xFE0 = %02x, expected 0x21\n", HW32_REG(CMSDK_UART1_BASE + 0xFE0));
return 1; /* part ID does not match */ return 1; /* part ID does not match */
}
else else
return 0; return 0;
} }
......
...@@ -1028,7 +1028,7 @@ EA ...@@ -1028,7 +1028,7 @@ EA
FB FB
DA DA
49 49
D2 DB
48 48
FF FF
F7 F7
...@@ -1042,15 +1042,15 @@ D1 ...@@ -1042,15 +1042,15 @@ D1
20 20
04 04
43 43
D7 D8
A0 A0
00 00
F0 F0
DF DF
FB FB
DD DE
49 49
CC D5
48 48
FF FF
F7 F7
...@@ -1064,15 +1064,15 @@ D1 ...@@ -1064,15 +1064,15 @@ D1
20 20
04 04
43 43
DA DB
A0 A0
00 00
F0 F0
D4 D4
FB FB
DB
49
DC DC
49
D0
48 48
FF FF
F7 F7
...@@ -1202,7 +1202,7 @@ F0 ...@@ -1202,7 +1202,7 @@ F0
FB FB
F6 F6
49 49
BB AF
48 48
FF FF
F7 F7
...@@ -1886,26 +1886,30 @@ AC ...@@ -1886,26 +1886,30 @@ AC
20 20
2D 2D
20 20
4E
6F
74
20
49
6D 6D
61
70
70 70
6C
65
6D
65
6E
74
65 65
64 64
20
74
6F
20
55
53
52
54
00
00 00
00 00
40 40
00 00
40 40
6C
0D
00
00
35 35
3A 3A
20 20
...@@ -1918,21 +1922,21 @@ AC ...@@ -1918,21 +1922,21 @@ AC
20 20
2D 2D
20 20
4E
6F
74
20
49
6D 6D
61
70
70 70
6C
65
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......
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F7 F7
D6 AB
FE FE
FF FF
F7 F7
E1 D0
FE FE
10 10
BD BD
70 70
B5 B5
3F 20
26 4C
22 05
4D
04
46
36
02
31
46 46
28 3F
21
20
46 46
FF FF
F7 F7
7D 80
FF FF
21 20
02 20
6C 05
14
21
43 43
32 29
46 46
28 3F
22
20
46 46
FF FF
F7 F7
A5 A8
FF FF
28 20
46 46
01 01
68 68
09 09
04 06
FC FC
D5 D5
20
22 22
46
00 00
21 21
FF FF
F7 F7
9D A0
FF FF
70 70
BD BD
16 15
48 48
01 01
68 68
09 09
04 06
FC FC
D4 D4
00 00
68 68
40 40
04 06
01 01
D4 D4
00 00
...@@ -2586,62 +2716,58 @@ D4 ...@@ -2586,62 +2716,58 @@ D4
47 47
70 70
B5 B5
3F 0F
26
10
4C 4C
05 05
46 46
36 3F
02 21
31
46
20 20
46 46
FF FF
F7 F7
59 5E
FF FF
29 29
02
65
14
29
43
32
46 46
20 20
20
01
43
3F
22
20
46 46
FF FF
F7 F7
81 86
FF FF
21 20
68 68
09 00
04 06
FC FC
D5 D5
2A 20
46 22
00 00
21 21
20 20
46 46
FF FF
F7 F7
79 7E
FF FF
20 21
68 68
00 09
04 06
FC FC
D4 D4
20 20
68 68
40 40
04 06
01 01
D4 D4
00 00
...@@ -2654,8 +2780,6 @@ BD ...@@ -2654,8 +2780,6 @@ BD
BD BD
00 00
00 00
00
00
01 01
40 40
0A 0A
...@@ -2976,7 +3100,7 @@ FF ...@@ -2976,7 +3100,7 @@ FF
46 46
FF FF
F7 F7
CC 8E
FA FA
00 00
28 28
...@@ -3306,8 +3430,8 @@ B5 ...@@ -3306,8 +3430,8 @@ B5
E0 E0
FF FF
F7 F7
23 E5
FD FC
40 40
1C 1C
08 08
...@@ -3326,8 +3450,8 @@ D1 ...@@ -3326,8 +3450,8 @@ D1
20 20
FF FF
F7 F7
19 DB
FD FC
10 10
BD BD
00 00
...@@ -3588,7 +3712,7 @@ F8 ...@@ -3588,7 +3712,7 @@ F8
46 46
FF FF
F7 F7
A1 63
FC FC
00 00
28 28
...@@ -3606,8 +3730,8 @@ BD ...@@ -3606,8 +3730,8 @@ BD
BD BD
00 00
00 00
37 BB
F9 F8
FF FF
FF FF
01 01
...@@ -3724,7 +3848,7 @@ B0 ...@@ -3724,7 +3848,7 @@ B0
B5 B5
FF FF
F7 F7
40 02
FC FC
60 60
BC BC
...@@ -3772,7 +3896,7 @@ C0 ...@@ -3772,7 +3896,7 @@ C0
46 46
FF FF
F7 F7
5D 1F
F9 F9
10 10
BD BD
...@@ -3826,7 +3950,7 @@ BD ...@@ -3826,7 +3950,7 @@ BD
30 30
78 78
00 00
14 90
0F 0F
00 00
00 00
...@@ -3842,7 +3966,7 @@ BD ...@@ -3842,7 +3966,7 @@ BD
01 01
00 00
00 00
28 A4
0F 0F
00 00
00 00
...@@ -3871,9 +3995,9 @@ BD ...@@ -3871,9 +3995,9 @@ BD
00 00
00 00
00 00
E1 1C
F5 4E
05 0E
00 00
00 00
00 00
......
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