flows/makefile.software

@@ -88,6 +88,12 @@ endif
 	      exit 1; \
 	    fi ;\
 	  fi ;\
+	  if [ -e expram_l.hex ] ; then \
+	  	cp expram_l.hex $(SIM_DIR)/expram_l.hex ; \
+	  fi ;\
+	  if [ -e expram_h.hex ] ; then \
+	  	cp expram_h.hex $(SIM_DIR)/expram_h.hex ; \
+	  fi ;\
 	  cd $(SIM_DIR) ;\
 	elif [ -d "$(PROJ_SW_DIR)/$(TESTNAME)" ] ; then \
 	  cd $(PROJ_SW_DIR)/$(TESTNAME) ;\

testcodes/dma350_tests/expram_h.hex

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testcodes/dma350_tests/expram_l.hex

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verif/tb/verilog/nanosoc_tb.v

@@ -927,6 +927,34 @@ nanosoc_ft1248x1_track
   // Format for time reporting
   initial    $timeformat(-9, 0, " ns", 0);
 
+  // Preload EXP rams
+  localparam aw_expram_l = u_nanosoc_chip_pads.u_nanosoc_chip.u_system.EXPRAM_L_RAM_ADDR_W;
+  localparam aw_expram_h = u_nanosoc_chip_pads.u_nanosoc_chip.u_system.EXPRAM_H_RAM_ADDR_W;
+
+  localparam awt_expram_l = ((1<<(aw_expram_l-2))-1);
+  localparam awt_expram_h = ((1<<(aw_expram_h-2))-1);
+
+  reg [7:0] fileimage_l [((1<<aw_expram_l)-1):0];
+  reg [7:0] fileimage_h [((1<<aw_expram_h)-1):0];
+  integer i,j;
+
+  initial begin
+    $readmemh("expram_l.hex", fileimage_l); 
+    for (i=0;i<awt_expram_l;i=i+1) begin 
+      u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_l.u_expram_l.u_sram.BRAM0[i] = fileimage_l[ 4*i];
+      u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_l.u_expram_l.u_sram.BRAM1[i] = fileimage_l[(4*i)+1];
+      u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_l.u_expram_l.u_sram.BRAM2[i] = fileimage_l[(4*i)+2];
+      u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_l.u_expram_l.u_sram.BRAM3[i] = fileimage_l[(4*i)+3];
+    end
+    $readmemh("expram_h.hex", fileimage_h); 
+    for (i=0;i<awt_expram_h;i=i+1) begin 
+      u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_h.u_expram_h.u_sram.BRAM0[i] = fileimage_h[ 4*i];
+      u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_h.u_expram_h.u_sram.BRAM1[i] = fileimage_h[(4*i)+1];
+      u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_h.u_expram_h.u_sram.BRAM2[i] = fileimage_h[(4*i)+2];
+      u_nanosoc_chip_pads.u_nanosoc_chip.u_system.u_ss_expansion.u_region_expram_h.u_expram_h.u_sram.BRAM3[i] = fileimage_h[(4*i)+3];
+    end
+  end
+
   // Configuration checks
   initial begin
 `ifdef CORTEX_M0DESIGNSTART