Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
NanoSoC Tech
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Jira
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Deploy
Releases
Package Registry
Model registry
Operate
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
SoCLabs
NanoSoC Tech
Repository
Something went wrong on our end
3bd655adb22d228381f7f47127ae0f00e7fb6b1e
Select Git revision
Branches
10
main
default
protected
feat_dma230_dataio
feat_qspi_rom
feat_extio
feat_dmax4
feat_dma350
feat_nanosoc_regions
feat_accel_decouple
dev
feat_accel_hash_stream
Tags
1
nanosoc-2023
11 results
nanosoc_tech
flows
makefile.software
Find file
Blame
Permalink
4 months ago
3bd655ad
Add memory preload for EXP rams in simulation
· 3bd655ad
Daniel Newbrook
authored
4 months ago
3bd655ad
History
Add memory preload for EXP rams in simulation
Daniel Newbrook
authored
4 months ago