Change PnR GDS units to match DRC

ASIC/44pin/Cadence/scripts/pnr_flow.tcl

@@ -99,7 +99,7 @@ write_stream $::env(SOCLABS_PROJECT_DIR)/imp/ASIC/nanosoc/nanosoc.gds \
     -map_file /home/dwn1c21/SoC-Labs/util/PRTF_EDI_65nm_001_Cad_V24a/PR_tech/Cadence/GdsOutMap/PRTF_EDI_N65_gdsout_6X1Z1U.24a.map \
     -lib_name DesignLib \
     -merge [list ${SC_GDS2} ${RF_16K_GDS2} ${RF_08K_GDS2} ${ROM_VIA_GDS2}]\
-    -output_macros -unit 2000 -mode all
+    -output_macros -unit 1000 -mode all
 
 
 write_netlist $::env(SOCLABS_PROJECT_DIR)/imp/ASIC/nanosoc/netlist_PnR/nanosoc_chip_pads_44pin.v