From cb18b8a2422eaf93b422d87ce13e34e44ef15f8a Mon Sep 17 00:00:00 2001
From: Daniel Newbrook <dwn1c21@soton.ac.uk>
Date: Thu, 1 Feb 2024 13:06:09 +0000
Subject: [PATCH] Change PnR GDS units to match DRC
---
ASIC/44pin/Cadence/scripts/pnr_flow.tcl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ASIC/44pin/Cadence/scripts/pnr_flow.tcl b/ASIC/44pin/Cadence/scripts/pnr_flow.tcl
index 312f543..5cdf387 100644
--- a/ASIC/44pin/Cadence/scripts/pnr_flow.tcl
+++ b/ASIC/44pin/Cadence/scripts/pnr_flow.tcl
@@ -99,7 +99,7 @@ write_stream $::env(SOCLABS_PROJECT_DIR)/imp/ASIC/nanosoc/nanosoc.gds \
-map_file /home/dwn1c21/SoC-Labs/util/PRTF_EDI_65nm_001_Cad_V24a/PR_tech/Cadence/GdsOutMap/PRTF_EDI_N65_gdsout_6X1Z1U.24a.map \
-lib_name DesignLib \
-merge [list ${SC_GDS2} ${RF_16K_GDS2} ${RF_08K_GDS2} ${ROM_VIA_GDS2}]\
- -output_macros -unit 2000 -mode all
+ -output_macros -unit 1000 -mode all
write_netlist $::env(SOCLABS_PROJECT_DIR)/imp/ASIC/nanosoc/netlist_PnR/nanosoc_chip_pads_44pin.v
--
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