Initial Update for 65nm and 28nm flows + synopsys SLM integration

ASIC/TSMC65nm/60pin/Synopsys/scripts/synthesis.tcl

ASIC/TSMC65nm/60pin/Synopsys/upf/nanosoc_chip_pads.upf

ASIC/TSMC65nm/accelerator_only/Cadence/scripts/genus.tcl

ASIC/TSMC65nm/accelerator_only/accel_constraints.sdc

ASIC/TSMC65nm/constraints.sdc

ASIC/TSMC65nm/rf_08k.spec

ASIC/TSMC65nm/rf_16k.spec

ASIC/TSMC65nm/rom_via.spec

ASIC/TSMC65nm/synopsys_lib_conversion.tcl

ASIC/nanosoc_chip_pads/tsmc28hpcp/nanosoc_chip_pads_38pin.v

flows/makefile.asic

makefile

nanosoc/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v

nanosoc/nanosoc_regions/sysio/verilog/nanosoc_sysio_decode.v

nanosoc/synopsys_28nm_slm_integration

projbranch

software/common/validation/snps_pvt_tests.c

testcodes/snps_pvt_tests/makefile

testcodes/snps_pvt_tests/snps_pvt_tests.hex