Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
NanoSoC Tech
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Jira
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Deploy
Releases
Package registry
Model registry
Operate
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
GitLab community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
SoCLabs
NanoSoC Tech
Commits
a6a5c6e6
Commit
a6a5c6e6
authored
2 years ago
by
dwf1m12
Browse files
Options
Downloads
Patches
Plain Diff
remove hard fault limits to memory bank regions for baseline
parent
4674470e
No related branches found
No related tags found
No related merge requests found
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
Cortex-M0/nanosoc/software/common/validation/memory_tests.c
+41
-41
41 additions, 41 deletions
Cortex-M0/nanosoc/software/common/validation/memory_tests.c
with
41 additions
and
41 deletions
Cortex-M0/nanosoc/software/common/validation/memory_tests.c
+
41
−
41
View file @
a6a5c6e6
...
...
@@ -43,14 +43,14 @@
#include
"CMSDK_CM4.h"
#endif
#define SRAM_BASE_ADDR 0x
2
0000000
#define SRAM_SIZE 0x
10
000
#define SRAM_BASE_ADDR 0x
3
0000000
#define SRAM_SIZE 0x
4
000
#define ROM_BASE_ADDR 0x
0
0000000
#define ROM_SIZE 0x
10
000
#define ROM_BASE_ADDR 0x
2
0000000
#define ROM_SIZE 0x
4
000
#define BOOT_BASE_ADDR 0x
0
1000000
#define BOOT_SIZE 0x400
0
#define BOOT_BASE_ADDR 0x1
0
000000
#define BOOT_SIZE 0x400
#define BOOT_ALIAS_SIZE 0x10000
#define APB_IO_BASE_ADDR 0x40000000
...
...
@@ -143,14 +143,14 @@ int rom_test(void)
if
(
hardfault_occurred
!=
0
)
err_code
|=
1
<<
1
;
/* Test addresses beyond ROM boundary */
hardfault_occurred
=
0
;
hardfault_expected
=
1
;
temp_data
=
address_test_read
(((
unsigned
)(
ROM_BASE_ADDR
-
4
)));
if
(
hardfault_occurred
==
0
)
err_code
|=
1
<<
2
;
hardfault_occurred
=
0
;
hardfault_expected
=
1
;
temp_data
=
address_test_read
(
ROM_BASE_ADDR
+
ROM_SIZE
);
if
(
hardfault_occurred
==
0
)
err_code
|=
1
<<
3
;
//
hardfault_occurred = 0;
//
hardfault_expected = 1;
//
temp_data = address_test_read(((unsigned)(ROM_BASE_ADDR-4)));
//
if (hardfault_occurred==0) err_code |= 1<<2;
//
hardfault_occurred = 0;
//
hardfault_expected = 1;
//
temp_data = address_test_read(ROM_BASE_ADDR+ROM_SIZE);
//
if (hardfault_occurred==0) err_code |= 1<<3;
if
(
err_code
>
0
)
{
puts
(
" Failed
\n
"
);
...
...
@@ -187,21 +187,21 @@ int boot_rom_test(void)
if
(
hardfault_occurred
!=
0
)
err_code
|=
1
<<
0
;
/* Test addresses beyond Boot loader ROM boundary */
hardfault_occurred
=
0
;
hardfault_expected
=
1
;
temp_data
=
address_test_read
(
BOOT_BASE_ADDR
-
4
);
if
(
hardfault_occurred
==
0
)
err_code
|=
1
<<
1
;
hardfault_occurred
=
0
;
hardfault_expected
=
0
;
/* 64KB range is allocated for boot ROM,
but only 4K is used. Access over 4KB range wraps round */
temp_data
=
address_test_read
(
BOOT_BASE_ADDR
+
BOOT_SIZE
);
if
(
hardfault_occurred
!=
0
)
err_code
|=
1
<<
2
;
hardfault_occurred
=
0
;
hardfault_expected
=
1
;
/* Check beyond alias range */
temp_data
=
address_test_read
(
BOOT_BASE_ADDR
+
BOOT_ALIAS_SIZE
);
if
(
hardfault_occurred
==
0
)
err_code
|=
1
<<
3
;
//
hardfault_occurred = 0;
//
hardfault_expected = 1;
//
temp_data = address_test_read(BOOT_BASE_ADDR-4);
//
if (hardfault_occurred==0) err_code |= 1<<1;
//
hardfault_occurred = 0;
//
hardfault_expected = 0; /* 64KB range is allocated for boot ROM,
//
but only 4K is used. Access over 4KB range wraps round */
//
temp_data = address_test_read(BOOT_BASE_ADDR+BOOT_SIZE);
//
if (hardfault_occurred!=0) err_code |= 1<<2;
//
hardfault_occurred = 0;
//
hardfault_expected = 1; /* Check beyond alias range */
//
temp_data = address_test_read(BOOT_BASE_ADDR+BOOT_ALIAS_SIZE);
//
if (hardfault_occurred==0) err_code |= 1<<3;
if
(
err_code
>
0
)
{
puts
(
" Failed
\n
"
);
...
...
@@ -230,15 +230,15 @@ int sram_test(void)
/* Test addresses beyond SRAM boundary */
hardfault_occurred
=
0
;
hardfault_expected
=
1
;
temp_data
=
address_test_read
(
SRAM_BASE_ADDR
-
4
);
if
(
hardfault_occurred
==
0
)
err_code
|=
1
<<
2
;
//
hardfault_occurred = 0;
//
hardfault_expected = 1;
//
temp_data = address_test_read(SRAM_BASE_ADDR-4);
//
if (hardfault_occurred==0) err_code |= 1<<2;
hardfault_occurred
=
0
;
hardfault_expected
=
1
;
temp_data
=
address_test_read
(
SRAM_BASE_ADDR
+
SRAM_SIZE
);
if
(
hardfault_occurred
==
0
)
err_code
|=
1
<<
3
;
//
hardfault_occurred = 0;
//
hardfault_expected = 1;
//
temp_data = address_test_read(SRAM_BASE_ADDR+SRAM_SIZE);
//
if (hardfault_occurred==0) err_code |= 1<<3;
hardfault_occurred
=
0
;
hardfault_expected
=
0
;
...
...
@@ -306,10 +306,10 @@ int apb_io_test(void)
if
(
hardfault_occurred
!=
0
)
err_code
|=
1
<<
1
;
/* Test addresses beyond IO boundary */
hardfault_occurred
=
0
;
hardfault_expected
=
1
;
temp_data
=
address_test_read
(
APB_IO_BASE_ADDR
-
4
);
if
(
hardfault_occurred
==
0
)
err_code
|=
1
<<
2
;
//
hardfault_occurred = 0;
//
hardfault_expected = 1;
//
temp_data = address_test_read(APB_IO_BASE_ADDR-4);
//
if (hardfault_occurred==0) err_code |= 1<<2;
/* Address above APB IO space is AHB GPIO, not test here */
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment