.gitmodules

flist/nanosoc.flist

flist/nanosoc_FPGA.flist

flist/nanosoc_ip.flist

flist/nanosoc_qs.flist

flist/nanosoc_vip.flist

flows/makefile.regression

flows/makefile.software

fpga/targets/pynq_z2/fpga_pinmap.xdc

fpga/targets/pynq_z2/nanosoc_design_wrapper.v

fpga/targets/pynq_z2/vivado_script/2021_1/nanosoc_design.tcl

fpga/targets/pynq_zcu104/nanosoc_design_wrapper.v

...rgets/pynq_zcu104/vivado_script/2021_1/nanosoc_design.tcl

...rgets/pynq_zcu104/vivado_script/2024_1/nanosoc_design.tcl

nanosoc/ahb_qspi

nanosoc/nanosoc_chip/chip/verilog/nanosoc_chip.v

nanosoc/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v

.../nanosoc_regions/flash_0/verilog/nanosoc_region_flash_0.v

nanosoc/nanosoc_regions/sysio/verilog/nanosoc_qspi_apb_ss.v

nanosoc/nanosoc_regions/sysio/verilog/nanosoc_region_sysio.v