Tie-off TEST mode pin inactive in testbench

verif/tb/verilog/nanosoc_tb.v

@@ -130,6 +130,8 @@ SROM_Ax32
   );
   `endif
 
+  assign TEST=1'b0;
+  
   // Pullup to suppress X-inputs
   pullup(P0[ 0]);
   pullup(P0[ 1]);