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Commit 11888561 authored by Daniel Newbrook's avatar Daniel Newbrook
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Remove uart to axi ip from pynq z2

parent 35345e85
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......@@ -51,7 +51,6 @@ xilinx.com:ip:ahblite_axi_bridge:3.0\
xilinx.com:ip:axi_bram_ctrl:4.1\
xilinx.com:ip:axi_gpio:2.0\
soclabs.org:user:axi_stream_io:1.0\
soclabs.org:user:uart_to_AXI_master:1.0\
xilinx.com:ip:axi_uartlite:2.0\
xilinx.com:ip:axis_data_fifo:2.0\
xilinx.com:ip:blk_mem_gen:8.4\
......
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