nanosoc_ip.bb

//-----------------------------------------------------------------------------
// NanoSoC Blackbox Lint Design Info File
// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
//
// Contributors
//
// David Mapstone (d.a.mapstone@soton.ac.uk)
//
// Copyright � 2021-3, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// Abstract : HAL Design Info File for Blackboxing NanoSoC IP Generated from Arm Scripts
//-----------------------------------------------------------------------------

bb_list
{
    // Exclude Bus Matrix as Generated from Arm IP
    designunit = nanosoc_busmatrix_lite;
    file = $SOCLABS_NANOSOC_TECH_DIR/system/nanosoc_busmatrix/verilog/nanosoc_busmatrix/nanosoc_busmatrix_lite.v;
    
    // Temporarily Exclude SoCDebug
    designunit = socdebug_ahb;
    file = $SOCLABS_NANOSOC_TECH_DIR/system/socdebug_tech/controller/verilog/socdebug_ahb.v;
}