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SoCLabs
Accelerator Wrapper Tech
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Commits on Source (2)
Delete .gitlab-ci.yml
· a248f149
dam1n19
authored
2 years ago
a248f149
SOC1-124
: Restructured environment setup and environment variable names
· 7a5fe702
dam1n19
authored
2 years ago
7a5fe702
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5 changed files
.gitlab-ci.yml
+0
-57
0 additions, 57 deletions
.gitlab-ci.yml
flist/wrapper_ip.flist
+0
-30
0 additions, 30 deletions
flist/wrapper_ip.flist
flow/stimgen.py
+5
-5
5 additions, 5 deletions
flow/stimgen.py
set_env.sh
+0
-50
0 additions, 50 deletions
set_env.sh
sourceme
+0
-44
0 additions, 44 deletions
sourceme
with
5 additions
and
186 deletions
.gitlab-ci.yml
deleted
100644 → 0
View file @
8cdaed6e
# This file is a template, and might need editing before it works on your project.
# This is a sample GitLab CI/CD configuration file that should run without any modifications.
# It demonstrates a basic 3 stage CI/CD pipeline. Instead of real tests or scripts,
# it uses echo commands to simulate the pipeline execution.
#
# A pipeline is composed of independent jobs that run scripts, grouped into stages.
# Stages run in sequential order, but jobs within stages run in parallel.
#
# For more information, see: https://docs.gitlab.com/ee/ci/yaml/index.html#stages
#
# You can copy and paste this template into a new `.gitlab-ci.yml` file.
# You should not add this template to an existing `.gitlab-ci.yml` file by using the `include:` keyword.
#
# To contribute improvements to CI/CD templates, please follow the Development guide at:
# https://docs.gitlab.com/ee/development/cicd/templates.html
# This specific template is located at:
# https://gitlab.com/gitlab-org/gitlab/-/blob/master/lib/gitlab/ci/templates/Getting-Started.gitlab-ci.yml
stages
:
# List of stages for jobs, and their order of execution
-
build
-
test
-
deploy
build-job
:
# This job runs in the build stage, which runs first.
stage
:
build
script
:
-
echo "Compiling the code..."
-
echo "Compile complete."
tags
:
-
FPGA
unit-test-job
:
# This job runs in the test stage.
stage
:
test
# It only starts when the job in the build stage completes successfully.
script
:
-
echo "Running unit tests... This will take about 60 seconds."
-
sleep
60
-
echo "Code coverage is 90%"
tags
:
-
FPGA
lint-test-job
:
# This job also runs in the test stage.
stage
:
test
# It can run at the same time as unit-test-job (in parallel).
script
:
-
echo "Linting code... This will take about 10 seconds."
-
sleep
10
-
echo "No lint issues found."
tags
:
-
FPGA
deploy-job
:
# This job runs in the deploy stage.
stage
:
deploy
# It only runs when *both* jobs in the test stage complete successfully.
environment
:
production
script
:
-
echo "Deploying application..."
-
echo "Application successfully deployed."
tags
:
-
FPGA
This diff is collapsed.
Click to expand it.
flist/wrapper_ip.flist
deleted
100644 → 0
View file @
8cdaed6e
//-----------------------------------------------------------------------------
// Accelerator Wrapper Filelist
// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
//
// Contributors
//
// David Mapstone (d.a.mapstone@soton.ac.uk)
//
// Copyright � 2021-3, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// Abstract : Verilog Command File for Accelerator Wrapper IP
//-----------------------------------------------------------------------------
// ============= Verilog library extensions ===========
+libext+.v+.vlib
// ============= Accelerator Module search path =============
-y $(ACC_WRAPPER_DIR)/hdl/src/
+incdir+$(ACC_WRAPPER_DIR)/hdl/src/
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_packet_constructor.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_packet_deconstructor.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_addr_calc.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_data_req.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_reg_interface.sv
// $(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_vr_interface.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_packet_construct.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_packet_deconstruct.sv
This diff is collapsed.
Click to expand it.
flow/stimgen.py
View file @
7a5fe702
...
...
@@ -188,15 +188,15 @@ def stimulus_generation(stim_file, ref_file, input_start_address, input_size, ou
# Generate ADP Command File with Write Transactions
adp_file
=
os
.
environ
[
"
SOC_TOP
_DIR
"
]
+
"
/system/stimulus/
"
+
"
adp_hash_stim.cmd
"
adp_file
=
os
.
environ
[
"
PROJECT
_DIR
"
]
+
"
/system/stimulus/
"
+
"
adp_hash_stim.cmd
"
adp_output
(
adp_file
,
output_word_list
)
# Generate FRI File with Write Transactions
fri_file
=
os
.
environ
[
"
SOC_TOP
_DIR
"
]
+
"
/wrapper/stimulus/
"
+
"
ahb_input_hash_stim.fri
"
fri_file
=
os
.
environ
[
"
PROJECT
_DIR
"
]
+
"
/wrapper/stimulus/
"
+
"
ahb_input_hash_stim.fri
"
fri_output
(
fri_file
,
output_word_list
)
# Call fm2conv.pl script
m2d_file
=
os
.
environ
[
"
SOC_TOP
_DIR
"
]
+
"
/wrapper/stimulus/
"
+
"
ahb_input_hash_stim.m2d
"
m2d_file
=
os
.
environ
[
"
PROJECT
_DIR
"
]
+
"
/wrapper/stimulus/
"
+
"
ahb_input_hash_stim.m2d
"
os
.
system
(
f
"
fm2conv.pl -busWidth=32 -infile=
{
fri_file
}
-outfile=
{
m2d_file
}
"
)
...
...
@@ -205,6 +205,6 @@ if __name__ == "__main__":
accelerator_input_size
=
0x0000_0800
accelerator_output_address
=
0x6001_0800
accelerator_output_size
=
0x0000_0800
stim_file
=
os
.
environ
[
"
SOC_TOP
_DIR
"
]
+
"
/wrapper/stimulus/
"
+
"
input_block_32bit_stim.csv
"
ref_file
=
os
.
environ
[
"
SOC_TOP
_DIR
"
]
+
"
/wrapper/stimulus/
"
+
"
output_hash_32bit_ref.csv
"
stim_file
=
os
.
environ
[
"
PROJECT
_DIR
"
]
+
"
/wrapper/stimulus/
"
+
"
input_block_32bit_stim.csv
"
ref_file
=
os
.
environ
[
"
PROJECT
_DIR
"
]
+
"
/wrapper/stimulus/
"
+
"
output_hash_32bit_ref.csv
"
stimulus_generation
(
stim_file
,
ref_file
,
accelerator_input_address
,
accelerator_input_size
,
accelerator_output_address
,
accelerator_output_size
)
\ No newline at end of file
This diff is collapsed.
Click to expand it.
set_env.sh
deleted
100644 → 0
View file @
8cdaed6e
#-----------------------------------------------------------------------------
# SoC Labs Environment Setup Script
# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
#
# Contributors
#
# David Mapstone (d.a.mapstone@soton.ac.uk)
#
# Copyright 2023, SoC Labs (www.soclabs.org)
#-----------------------------------------------------------------------------
#!/bin/bash
# Get Root Location of Design Structure
if
[
-z
$DESIGN_ROOT
]
;
then
# If $DESIGN_ROOT hasn't been set yet
DESIGN_ROOT
=
`
git rev-parse
--show-superproject-working-tree
`
if
[
-z
$DESIGN_ROOT
]
;
then
# If not in a submodule - at root
DESIGN_ROOT
=
`
git rev-parse
--show-toplevel
`
fi
# Source Top-Level Sourceme
source
$DESIGN_ROOT
/set_env.sh
else
# Set Environment Variable for this Repository
export
ACC_WRAPPER_DIR
=
"
$(
cd
-P
"
$(
dirname
"
${
BASH_SOURCE
[0]
:-${
(%)
:-
%x
}}
"
)
"
&&
pwd
)
"
# If this Repo is root of workspace
if
[
$ACC_WRAPPER_DIR
=
$DESIGN_ROOT
]
;
then
echo
"Design Workspace:
$DESIGN_ROOT
"
export
DESIGN_ROOT
# Set Default Simulator
export
SIMULATOR
=
"ivlog"
fi
# Source environment variables for all submodules
for
d
in
$ACC_WRAPPER_DIR
/
*
;
do
if
[
-e
"
$d
/.git"
]
;
then
if
[
-f
"
$d
/set_env.sh"
]
;
then
# If .git file exists - submodule
source
$d
/set_env.sh
fi
fi
done
# Add Scripts to Path
export
PATH
=
"
$PATH
:/
$ACC_WRAPPER_DIR
/flow"
fi
This diff is collapsed.
Click to expand it.
sourceme
deleted
100755 → 0
View file @
8cdaed6e
#-----------------------------------------------------------------------------
# SoC Labs Environment Setup Script
# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
#
# Contributors
#
# David Mapstone (d.a.mapstone@soton.ac.uk)
#
# Copyright 2022, SoC Labs (www.soclabs.org)
#-----------------------------------------------------------------------------
#!/usr/bin/env bash
if [ -z "$ACC_WRAPPER_DIR" ]; then
# Set environment Variables for Repository
export ACC_WRAPPER_DIR="$(cd -P "$(dirname "${BASH_SOURCE[0]:-${(%):-%x}}")" && pwd)"
if [ -z "$SOC_ENV_SET" ]; then
# Add flow directory to Path
export PATH=$PATH:$ACC_WRAPPER_DIR/flow
# Set Default Simulator
export SIMULATOR="ivlog"
# Set Top-level Directory
export SOC_TOP=$ACC_WRAPPER_DIR
# Set flag to say this is top level repo
export SOC_ENV_SET="True"
# Source Top-level sourceme
for d in $ACC_WRAPPER_DIR/../* ; do
if [ -d "$d" ]; then
if test -f "$d/sourceme"; then
source $d/sourceme
fi
fi
done
# Clear SOC_ENV_SET Variable
unset SOC_ENV_SET
fi
fi
\ No newline at end of file
This diff is collapsed.
Click to expand it.