wrapper_ip.flist

//-----------------------------------------------------------------------------
// Accelerator Wrapper Filelist
// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
//
// Contributors
//
// David Mapstone (d.a.mapstone@soton.ac.uk)
//
// Copyright � 2021-3, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// Abstract : Verilog Command File for Accelerator Wrapper IP
//-----------------------------------------------------------------------------

// ============= Verilog library extensions ===========
+libext+.v+.vlib

// =============    Accelerator Module search path    =============
-y $(ACC_WRAPPER_DIR)/hdl/src/
+incdir+$(ACC_WRAPPER_DIR)/hdl/src/

$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_packet_constructor.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_packet_deconstructor.sv

$(ACC_WRAPPER_DIR)/hdl/src/wrapper_addr_calc.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_data_req.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_reg_interface.sv
// $(ACC_WRAPPER_DIR)/hdl/src/wrapper_ahb_vr_interface.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_packet_construct.sv
$(ACC_WRAPPER_DIR)/hdl/src/wrapper_packet_deconstruct.sv