Redistributed Filelists

flist/accelerator_wrapper_ip.flist

+//-----------------------------------------------------------------------------
+// Accelerator Wrapper Filelist
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// David Mapstone (d.a.mapstone@soton.ac.uk)
+//
+// Copyright � 2021-3, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+//-----------------------------------------------------------------------------
+// Abstract : Verilog Command File for Accelerator Wrapper IP
+//-----------------------------------------------------------------------------
+
+// ============= Verilog library extensions ===========
++libext+.v+.vlib
+
+// =============    Accelerator Module search path    =============
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_ahb_packet_constructor.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_ahb_packet_deconstructor.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_addr_calc.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_data_req.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_ahb_reg_interface.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_packet_construct.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_packet_deconstruct.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_req_ctrl_reg.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_dmac_req.sv
+$(SOCLABS_WRAPPER_TECH_DIR)/hdl/src/wrapper_valid_filter.sv