Updated Filelists and added environment variables to dependency_env

env/dependency_env.sh

@@ -26,8 +26,11 @@ export SOCLABS_NANOSOC_TECH_DIR="$SOCLABS_PROJECT_DIR/nanosoc_tech"
 # SoCDebug
 export SOCLABS_SOCDEBUG_TECH_DIR="$SOCLABS_PROJECT_DIR/nanosoc_tech/system/socdebug_tech"
 
-# SLCore M0
-export SOCLABS_SLCOREM0_TECH_DIR="$SOCLABS_PROJECT_DIR/nanosoc_tech/system/slcore_m0_tech"
+# SLCore-M0
+export SOCLABS_SLCOREM0_TECH_DIR="$SOCLABS_PROJECT_DIR/nanosoc_tech/system/slcorem0_tech"
+
+# SLDMA-230
+export SOCLABS_SLDMA230_TECH_DIR="$SOCLABS_PROJECT_DIR/nanosoc_tech/system/sldma230_tech"
 
 # Primtives
 export SOCLABS_PRIMITIVES_TECH_DIR="$SOCLABS_PROJECT_DIR/rtl_primitives_tech"

flist/nanosoc/nanosoc_chip_ip.flist

-//-----------------------------------------------------------------------------
-// NanoSoC Chip Related IP Filelist
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Mapstone (d.a.mapstone@soton.ac.uk)
-//
-// Copyright � 2021-3, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-//-----------------------------------------------------------------------------
-// Abstract : Verilog Command File for NanoSoC Bus Matrix IP
-//-----------------------------------------------------------------------------
-
-// ============= Verilog library extensions ===========
-+libext+.v+.vlib
-
-// =============    NanoSoC Bus Matrix IP search path    =============
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_chip.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_chip_pads.v
-
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_cpu.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_sysio.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_sys_ahb_decode.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_apb_subsystem.v
-
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_ahb_cs_rom_table.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_mcu_pin_mux.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_mcu_stclkctrl.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_mcu_clkctrl.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_mcu_sysctrl.v
-
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_apb_usrt.v
-$(SOCLABS_NANOSOC_TECH_DIR)/system/src/verilog/nanosoc_ahb_bootrom.v
\ No newline at end of file

flist/nanosoc/nanosoc_matrix_ip.flist

-//-----------------------------------------------------------------------------
-// NanoSoC Bus Matrix IP Filelist
-// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
-//
-// Contributors
-//
-// David Mapstone (d.a.mapstone@soton.ac.uk)
-//
-// Copyright � 2021-3, SoC Labs (www.soclabs.org)
-//-----------------------------------------------------------------------------
-//-----------------------------------------------------------------------------
-// Abstract : Verilog Command File for NanoSoC Bus Matrix IP
-//-----------------------------------------------------------------------------
-
-// ============= Verilog library extensions ===========
-+libext+.v+.vlib
-
-// =============    NanoSoC Bus Matrix IP search path    =============
-+incdir+$(SOCLABS_NANOSOC_TECH_DIR)/system/src/nanosoc_ahb_busmatrix/verilog/nanosoc_ahb32_4x7_busmatrix
-
--y $(SOCLABS_NANOSOC_TECH_DIR)/system/src/nanosoc_ahb_busmatrix/verilog/nanosoc_ahb32_4x7_busmatrix
\ No newline at end of file

flist/project/system.flist

@@ -34,7 +34,7 @@
 -f $(SOCLABS_PROJECT_DIR)/flist/apb/apb_ip.flist
 
 // - NanoSoC Chip IP
--f $(SOCLABS_NANOSOC_TECH_DIR)/flist/nanosoc.flist
+-f $(SOCLABS_NANOSOC_TECH_DIR)/flist/nanosoc_ip.flist
 
 // - NanoSoc Test Interface IP
 -f $(SOCLABS_PROJECT_DIR)/flist/nanosoc/nanosoc_test_io_ip.flist
@@ -55,7 +55,7 @@
 -f $(SOCLABS_PROJECT_DIR)/flist/cortex-m0/cortex-m0_ip.flist
 
 // - NanoSoC Custom Expansion Region
-$(SOCLABS_PROJECT_DIR)/system/src/nanosoc_exp.v
+//$(SOCLABS_PROJECT_DIR)/system/src/nanosoc_exp.v
 
 // - Top level
 -f $(SOCLABS_PROJECT_DIR)/flist/nanosoc/nanosoc_tb.flist

nanosoc_tech @ 226b723d

-Subproject commit be8c5137ae9d04a798e6d6bdfa42b522397a1457
+Subproject commit 226b723d27c500624446478a2303588500b3eddd