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Commit 4b69cb50 authored by dam1n19's avatar dam1n19
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SOC1-167: Added flow suffix to flow sub repositories

parent 52d6d3f6
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...@@ -5,10 +5,10 @@ url = git@git.soton.ac.uk:soclabs/accelerator-wrapper.git ...@@ -5,10 +5,10 @@ url = git@git.soton.ac.uk:soclabs/accelerator-wrapper.git
path = nanosoc_tech path = nanosoc_tech
url = git@git.soton.ac.uk:soclabs/nanosoc.git url = git@git.soton.ac.uk:soclabs/nanosoc.git
[submodule "socsim"] [submodule "socsim"]
path = socsim path = socsim_flow
url = git@git.soton.ac.uk:soclabs/socsim.git url = git@git.soton.ac.uk:soclabs/socsim.git
[submodule "CHIPKIT"] [submodule "CHIPKIT"]
path = chipkit path = chipkit_flow
url = git@git.soton.ac.uk:soclabs/CHIPKIT.git url = git@git.soton.ac.uk:soclabs/CHIPKIT.git
[submodule "secworks-sha256"] [submodule "secworks-sha256"]
path = secworks-sha256 path = secworks-sha256
...@@ -19,3 +19,6 @@ url = git@git.soton.ac.uk:soclabs/CHIPKIT.git ...@@ -19,3 +19,6 @@ url = git@git.soton.ac.uk:soclabs/CHIPKIT.git
[submodule "fpga-lib"] [submodule "fpga-lib"]
path = fpga_lib_tech path = fpga_lib_tech
url = git@git.soton.ac.uk:soclabs/fpga-lib.git url = git@git.soton.ac.uk:soclabs/fpga-lib.git
[submodule "vanillaflow"]
path = vanillaflow_flow
url = git@git.soton.ac.uk:soclabs/vanillaflow.git
File moved
...@@ -34,7 +34,7 @@ export GENERIC_LIB_TECH_DIR="$PROJECT_DIR/generic_lib_tech" ...@@ -34,7 +34,7 @@ export GENERIC_LIB_TECH_DIR="$PROJECT_DIR/generic_lib_tech"
#----------------------------------------------------------------------------- #-----------------------------------------------------------------------------
# CHIPKIT - Register Generation # CHIPKIT - Register Generation
export CHIPKIT_FLOW_DIR="$PROJECT_DIR/chipkit" export CHIPKIT_FLOW_DIR="$PROJECT_DIR/chipkit_flow"
# SoCSim - Basic Simulation Flow Wrapper # SoCSim - Basic Simulation Flow Wrapper
export SOCSIM_FLOW_DIR="$PROJECT_DIR/socsim" export SOCSIM_FLOW_DIR="$PROJECT_DIR/socsim_flow"
\ No newline at end of file \ No newline at end of file
Subproject commit cb75144cc56c13ec4e4ea672d4e38ba3552001fa Subproject commit c04ad57b008e85421dcb4a0a69b54a54e386c3a7
...@@ -10,10 +10,10 @@ ...@@ -10,10 +10,10 @@
#----------------------------------------------------------------------------- #-----------------------------------------------------------------------------
# Each Repo needs to have its branch set manually in here - they will defaultly be checked out to main # Each Repo needs to have its branch set manually in here - they will defaultly be checked out to main
# Project Repository Subrepository Branch Index # Project Repository Subrepository Branch Index
nanosoc: feat_accel_decouple nanosoc_tech: feat_accel_decouple
CHIPKIT: main chipkit_flow: main
accelerator-wrapper: main accelerator_wrapper_tech: main
fpga-lib: main fpga_lib_tech: main
generic-lib: main generic_lib_tech: main
secworks-sha256: main secworks-sha256: main
socsim: main socsim_flow: main
\ No newline at end of file \ No newline at end of file
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