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ks6n19
ARM_SoC
Commits
f15e6cf2
Commit
f15e6cf2
authored
4 years ago
by
ks6n19
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Update behavioural/arm_soc.sv
parent
032ed3c6
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behavioural/arm_soc.sv
+8
-3
8 additions, 3 deletions
behavioural/arm_soc.sv
with
8 additions
and
3 deletions
behavioural/arm_soc.sv
+
8
−
3
View file @
f15e6cf2
...
@@ -8,8 +8,7 @@ module arm_soc(
...
@@ -8,8 +8,7 @@ module arm_soc(
input
[
15
:
0
]
Switches
,
input
[
15
:
0
]
Switches
,
input
[
1
:
0
]
Buttons
,
input
[
1
:
0
]
Buttons
,
output
logic
[
8
:
0
]
x1
,
x2
,
y1
,
y2
,
output
[
15
:
0
]
DataOut
,
output
DataValid
,
output
DataValid
,
output
LOCKUP
output
LOCKUP
...
@@ -18,6 +17,7 @@ module arm_soc(
...
@@ -18,6 +17,7 @@ module arm_soc(
timeunit
1
ns
;
timeunit
1
ns
;
timeprecision
100
ps
;
timeprecision
100
ps
;
// Global & Master AHB Signals
// Global & Master AHB Signals
wire
[
31
:
0
]
HADDR
,
HWDATA
,
HRDATA
;
wire
[
31
:
0
]
HADDR
,
HWDATA
,
HRDATA
;
wire
[
1
:
0
]
HTRANS
;
wire
[
1
:
0
]
HTRANS
;
...
@@ -94,8 +94,13 @@ timeprecision 100ps;
...
@@ -94,8 +94,13 @@ timeprecision 100ps;
.
HSEL
(
HSEL_DOUT
),
.
HSEL
(
HSEL_DOUT
),
.
HRDATA
(
HRDATA_DOUT
),
.
HREADYOUT
(
HREADYOUT_DOUT
),
.
HRDATA
(
HRDATA_DOUT
),
.
HREADYOUT
(
HREADYOUT_DOUT
),
.
DataOut
(
DataOut
),
.
DataValid
(
DataValid
)
.
x1
(
x1
),
.
x2
(
x2
),
.
y1
(
y1
),
.
y2
(
y2
),
.
DataValid
(
DataValid
)
);
);
// razzle
razzle
raz_1
(
.
x1
(
x1
),
.
x2
(
x2
),
.
y1
(
y1
),
.
y2
(
y2
)
)
;
endmodule
endmodule
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