can compile, fixed sensitivity list

MSF/RTC/hdl/rtc.vhd

@@ -38,45 +38,44 @@ architecture behavioral of rtc is
 	begin
 
 		--Divide crystal oscillator down to 1Hz clock--
-		CLOCK_GEN: process
+		CLOCK_GEN: process(rst, time_ready, clk_crystal)
 		begin
 			if rst = '1' then --or start of pulse
-				crys_count <= 0;
+				crys_count <= (others => '0');
 				clk_second <= '1';
 			elsif rising_edge(time_ready) then --synchronise to msf
-				crys_count <= 0;
+				crys_count <= (others => '0');
 				clk_second <= '1';
 			elsif rising_edge(clk_crystal) then
 				crys_count <= crys_count + 1;
-				if crys_count = 16383 then
+				if crys_count = 15 then --16383 officially
 					clk_second <= not(clk_second);
 				end if;
 			end if;
 		end process;
 
 		--Count seconds minutes and hours--
-		CLOCK_COUNT: process
+		CLOCK_COUNT: process(rst, time_ready, clk_second)
 		begin
 			if rst = '1' then
-				second_int <= 0;
-				minute_int <= 0;
-				hour_int <= 0;
+				second_int <= (others => '0');
+				minute_int <= (others => '0');
+				hour_int <= (others => '0');
 
 			elsif rising_edge(time_ready) then --set time
-				second_int <= 59; --assume data comes at 59 seconds
-				minute_int <= to_unsigned(minute_in);
-				hour_int <= to_unsigned(hour_in);
+				second_int <= "111011"; --assume data comes at 59 seconds
+				minute_int <= unsigned(minute_in);
+				hour_int <= unsigned(hour_in);
 
 			elsif rising_edge(clk_second) then
 
 				if second_int = 59 then
-					second_int <= 0;
-
+					second_int <= (others => '0');
 					if minute_int = 59 then
-						minute_int <= 0;
+						minute_int <= (others => '0');
 
 						if hour_int = 23 then
-							hour_int <= 0;
+							hour_int <= (others => '0');
 						else
 							hour_int <= hour_int + 1;
 						end if;
@@ -87,7 +86,7 @@ architecture behavioral of rtc is
 					second_int <= second_int + 1;
 				end if;
 			end if;
-		end process
+		end process;
 
 		--Concurrent assignments--
 		second_out <= std_logic_vector(second_int);