added a 12 bit input process that reads from the adc input csv test vector file

MSF/MSF_decoder/tb/basic_msf_signal_tb.vhd

@@ -2,6 +2,7 @@ library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;
 use std.textio.all;
+use ieee.std_logic_textio.all;
 
 
 entity basic_msf_signal_tb is
@@ -24,6 +25,7 @@ architecture basic_msf_signal of basic_msf_signal_tb is
 	signal d_week_out	: std_logic_vector (2 downto 0) := (others => '0');
 	signal hour_out		: std_logic_vector (5 downto 0) := (others => '0');
 	signal minute_out	: std_logic_vector (6 downto 0) := (others => '0');
+	signal h_filter_in_12bit	: std_logic_vector (11 downto 0) := (others => '0');
 	
 	signal msf_a_string	: std_logic_vector (58 downto 0) := (others => '0');
 	signal msf_b_string	: std_logic_vector (58 downto 0) := (others => '0');
@@ -40,6 +42,7 @@ architecture basic_msf_signal of basic_msf_signal_tb is
 	
 	--File variables--
 	file f_TIME_DATA	: text;
+	file f_12BIT_DATA	: text;
 	
 	--Parity Check Function--
 	function parity_check(vector : std_logic_vector) return std_logic is
@@ -222,6 +225,7 @@ architecture basic_msf_signal of basic_msf_signal_tb is
 			variable int_conv	: integer;
 			file f_SAMPLE_DATA	: text open write_mode is "H:\MSF_Project\msf_sample.csv";
 			begin
+				wait; --
 				for i in 0 to 2000 loop
 					if h_filter_in = '1' then
 						int_conv := 1;
@@ -235,6 +239,21 @@ architecture basic_msf_signal of basic_msf_signal_tb is
 	
 		end process SAMPLE_OUTPUT;
 		
+		--Send 12 bit MSF signal--
+		SEND_12BIT_DATA: process
+			variable hex_val : std_logic_vector(11 downto 0);
+			variable new_line : line;
+		
+			begin
+				file_open(f_12BIT_DATA, "H:\MSF_Project\adc_msf_input.csv", read_mode);
+				while not endfile(f_12BIT_DATA) loop
+					wait until rising_edge(fast_clk);
+					readline(f_12BIT_DATA, new_line);
+					hread(new_line, hex_val);
+					h_filter_in_12bit <= hex_val;
+				end loop;
+		end process SEND_12BIT_DATA;
+
 
 	--end;