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Synopsys 28nm SLM Integration
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SoCLabs
Synopsys 28nm SLM Integration
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360ce9e59a9f201a58b2f7753957804d7573fe81
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Created with Raphaël 2.2.0
11
Feb
15
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5
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3
14
Aug
Adjust VM apb address map for easier use
main
main
All wrappers verified in gate sims
Add verification environment for PLL. Now verified in gate sims
add autoreset of gear shift and enable counters
Add pwron and reset software control
Fix gear shift reg in PLL
fix unsynthesizable constructs
Initial Commit 2
Initial commit
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