Added defines_compile script to generate verilog defines header

bin/defines_compile.py

+#!/usr/bin/env python3
+#------------------------------------------------------------------------------------
+# Verilog Filelist compilation script
+# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+#
+# Contributors
+#
+# David Mapstone (d.a.mapstone@soton.ac.uk)
+# Copyright (c) 2023, SoC Labs (www.soclabs.org)
+#------------------------------------------------------------------------------------
+
+import argparse
+import os
+
+# Files with these extensions are included in compiled filelists
+verilog_extensions = (".v", ".sv", ".vh")
+
+# Exclude paths including these strings
+filelist_exclusions = ["cortex","pl230"]
+
+filelist_header = """//-----------------------------------------------------------------------------
+// AUTOGENERATED: Compiled Verilog Defines List
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// David Mapstone (d.a.mapstone@soton.ac.uk)
+//
+// Copyright 2021-3, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+//-----------------------------------------------------------------------------
+// Abstract : Verilog Defines file
+//-----------------------------------------------------------------------------
+
+"""
+
+def defines_compile(args):
+    temp_str = ""
+    if len(args.defines) > 0:
+        for define in args.defines:
+            temp_str += f"`define {define}\n"
+    return temp_str
+    
+def defines_list_compile(args):
+    output_defineslist = args.output
+    print("Compiling Defines")
+    # Compile string
+    defines_str = filelist_header 
+    defines_str += defines_compile(args)
+    # Write out output file
+    f_outlist = open(output_defineslist, "w")
+    f_outlist.write(defines_str)
+    f_outlist.close()
+
+if __name__ == "__main__":
+    # Capture Arguments from Command Line
+    parser = argparse.ArgumentParser(description='Compiles Verilog Defines List')
+    parser.add_argument("-o", "--output", type=str, help="Output Filelist location")
+    parser.add_argument('-d', '--defines', nargs='+', default=[], help="List of defines to put into file")
+    args = parser.parse_args()
+    defines_list_compile(args)
\ No newline at end of file

bin/filelist_compile.py

@@ -152,8 +152,8 @@ def defines_compile(args):
     temp_str = ""
     if len(args.defines) > 0:
         for define in args.defines:
-            temp_str += "set_property generic {" + str(define) + "} [current_fileset]\n"
-            temp_str += "set_property verilog_define {" + str(define) + "} [current_fileset]\n"
+            temp_str += 'set_property generic "' + str(define) + '" [current_fileset]\n'
+            temp_str += 'set_property verilog_define "' + str(define) + '" [current_fileset]\n'
     return temp_str
     
 def filelist_compile(args):
@@ -166,10 +166,13 @@ def filelist_compile(args):
     filelist = [x+"\n" for x in filelist]
     # Create string of all paths to write out
     filelist_str = filelist_header if (args.tcl == False) else filelist_header.replace("//","#")
+    if args.tcl == True:
+        # filelist_str += incdir_compile(args, incdirs) + "\n"
+        filelist_str += defines_compile(args)
     for path in filelist: filelist_str += path
     if args.tcl == True:
         filelist_str += incdir_compile(args, incdirs) + "\n"
-        filelist_str += defines_compile(args)
+        # filelist_str += defines_compile(args)
     # Write out output filelist
     f_outlist = open(output_filelist, "w")
     f_outlist.write(filelist_str)