flist/socdebug_controller_ip.flist

+//-----------------------------------------------------------------------------
+// SoCDebug Controller IP Filelist
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// David Mapstone (d.a.mapstone@soton.ac.uk)
+//
+// Copyright � 2021-3, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+//-----------------------------------------------------------------------------
+// Abstract : Verilog Command File for NanoSoC Bus Matrix IP
+//-----------------------------------------------------------------------------
+
+// ============= Verilog library extensions ===========
++libext+.v+.vlib
+
+// =============    SoCDebug IP search path    =============
+
+$(SOCLABS_SOCDEBUG_TECH_DIR)/controller/verilog/socdebug_adp_control.v
+$(SOCLABS_SOCDEBUG_TECH_DIR)/controller/verilog/socdebug_ahb.v
+$(SOCLABS_SOCDEBUG_TECH_DIR)/controller/verilog/socdebug_ft1248_control.v
+$(SOCLABS_SOCDEBUG_TECH_DIR)/controller/verilog/socdebug_usrt_control.v
\ No newline at end of file