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  • main
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  • soclabs/socdebug_tech
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fpga/makefile
View file @ 3a7164e0
......@@ -19,6 +19,11 @@ package_adp_control:
@echo Packaging Uart To AXI Master
@mkdir -p $(IMP_SOCKET_DIR)
@cp -r $(RTL_SOCKET_DIR)/ADPcontrol_1.0 $(IMP_SOCKET_DIR)/ADPcontrol_1.0
package_extio_control:
@echo Packaging Uart To AXI Master
@mkdir -p $(IMP_SOCKET_DIR)
@cp -r $(RTL_SOCKET_DIR)/extio8x4_axis_target_1.0 $(IMP_SOCKET_DIR)/extio8x4_axis_target_1.0
package_axi_stream_io:
@echo Packaging Uart To AXI Master
......@@ -35,7 +40,7 @@ package_uart_to_axi:
@mkdir -p $(IMP_SOCKET_DIR)
@cp -r $(RTL_SOCKET_DIR)/uart_to_AXI_master_1.0 $(IMP_SOCKET_DIR)/uart_to_AXI_master_1.0
package_socket: clean_socket package_uart package_ft1248_to_stream package_axi_stream_io package_adp_control
package_socket: clean_socket package_uart package_ft1248_to_stream package_axi_stream_io package_adp_control package_extio_control
# package_socket: clean_socket package_uart package_f232h package_streamio package_adp_control
clean_socket:
......@@ -176,4 +181,4 @@ package_adp_manager: flist_adp_manager
@cd $(RUN_DIR); vivado -mode batch -source $(SOCLABS_SOCTOOLS_FLOW_DIR)/resources/fpga/package_component.tcl
@mkdir -p $(ADP_MANAGER_IMP_DIR)/logs
@cp $(RUN_DIR)/vivado.log $(ADP_MANAGER_IMP_DIR)/logs
@echo AXI Stream Interface Packaged
\ No newline at end of file
@echo AXI Stream Interface Packaged