added header to filelist

flist/socdebug.flist

+//-----------------------------------------------------------------------------
+// SoCDebug Top-level Filelist
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// David Mapstone (d.a.mapstone@soton.ac.uk)
+//
+// Copyright � 2021-3, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+//-----------------------------------------------------------------------------
+// Abstract : Verilog Command File for NanoSoC Bus Matrix IP
+//-----------------------------------------------------------------------------
+
+// Include SoCDebug Controller IP filelist
+-f $(SOCLABS_SOCDEBUG_TECH_DIR)/flist/socdebug_controller_ip.flist
\ No newline at end of file