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Commit 1dd9a82c authored by David Mapstone's avatar David Mapstone
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SOC1-121: Updated filelist and removed socsim scripts from this repo

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......@@ -16,18 +16,18 @@
+libext+.v+.vlib
// ============= Accelerator Module search path =============
-y $DESIGN/sha-2-accelerator/hdl/src/
+incdir+$DESIGN/sha-2-accelerator/hdl/src/
-y ${ACC_ENGINE_DIR}/hdl/src/
+incdir+${ACC_ENGINE_DIR}/hdl/src/
$DESIGN/sha-2-accelerator/hdl/src/fifo_vr.sv
$DESIGN/sha-2-accelerator/hdl/src/sha256_hash_compression.sv
$DESIGN/sha-2-accelerator/hdl/src/sha256_hashing_stream.sv
$DESIGN/sha-2-accelerator/hdl/src/sha256_message_build.sv
${ACC_ENGINE_DIR}/hdl/src/fifo_vr.sv
${ACC_ENGINE_DIR}/hdl/src/sha256_hash_compression.sv
${ACC_ENGINE_DIR}/hdl/src/sha256_hashing_stream.sv
${ACC_ENGINE_DIR}/hdl/src/sha256_message_build.sv
// $DESIGN/sha-2-accelerator/hdl/src/sha256_1_3_arbitrator.sv
// $DESIGN/sha-2-accelerator/hdl/src/sha256_config_sync.sv
// $DESIGN/sha-2-accelerator/hdl/src/sha256_engine.sv
// $DESIGN/sha-2-accelerator/hdl/src/sha256_id_buf.sv
// $DESIGN/sha-2-accelerator/hdl/src/sha256_id_issue.sv
// $DESIGN/sha-2-accelerator/hdl/src/sha256_id_validator.sv
// $DESIGN/sha-2-accelerator/hdl/src/sha256_packet_manager.sv
// ${ACC_ENGINE_DIR}/hdl/src/sha256_1_3_arbitrator.sv
// ${ACC_ENGINE_DIR}/hdl/src/sha256_config_sync.sv
// ${ACC_ENGINE_DIR}/hdl/src/sha256_engine.sv
// ${ACC_ENGINE_DIR}/hdl/src/sha256_id_buf.sv
// ${ACC_ENGINE_DIR}/hdl/src/sha256_id_issue.sv
// ${ACC_ENGINE_DIR}/hdl/src/sha256_id_validator.sv
// ${ACC_ENGINE_DIR}/hdl/src/sha256_packet_manager.sv
#-----------------------------------------------------------------------------
# SoC Labs icarus verilog simulation script for engine testbench
# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
#
# Contributors
#
# David Mapstone (d.a.mapstone@soton.ac.uk)
#
# Copyright 2022, SoC Labs (www.soclabs.org)
#-----------------------------------------------------------------------------
#!/usr/bin/env bash
mkdir -p $SOC_TOP_DIR/simulate/sim/
iverilog -I $SOC_TOP_DIR/hdl/verif/ -I $SOC_TOP_DIR/hdl/src/ -g2012 -o $SOC_TOP_DIR/simulate/sim/$1.vvp $SOC_TOP_DIR/hdl/verif/tb_$1.sv
cd $SOC_TOP_DIR/simulate/sim/ && vvp $1.vvp $2
\ No newline at end of file
#-----------------------------------------------------------------------------
# SoC Labs socsim script to run required simulation
# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
#
# Contributors
#
# David Mapstone (d.a.mapstone@soton.ac.uk)
#
# Copyright 2022, SoC Labs (www.soclabs.org)
#-----------------------------------------------------------------------------
#!/usr/bin/env bash
DEFAULT_SIMULATOR="ivlog"
if [[ -z "${SIMULATOR}" ]]; then
SIMULATOR=$DEFAULT_SIMULATOR
fi
$SOC_TOP_DIR"/flow/simulators/"$SIMULATOR"_sim.sh" $@
#-----------------------------------------------------------------------------
# SoC Labs socsim script to run required simulation
# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
#
# Contributors
#
# David Mapstone (d.a.mapstone@soton.ac.uk)
#
# Copyright 2022, SoC Labs (www.soclabs.org)
#-----------------------------------------------------------------------------
#!/usr/bin/env bash
python3 $ACC_ENGINE_DIR"/flow/socsim_py.py" $@
\ No newline at end of file
#-----------------------------------------------------------------------------
# SoC Labs socsim script to run required simulation
# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
#
# Contributors
#
# David Mapstone (d.a.mapstone@soton.ac.uk)
#
# Copyright 2022, SoC Labs (www.soclabs.org)
#-----------------------------------------------------------------------------
import argparse
parser = argparse.ArgumentParser()
parser.add_argument("-m", "--model", type=str, help="Python Model used to generate Sitmulus and Reference for design")
parser.add_argument("-s", "--stimulus", type=str, help="Stimulus to pass to Python Model to generate Testbench Stimulus and Reference")
parser.parse_args()
\ No newline at end of file
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