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Commit 39ca7134 authored by Daniel Newbrook's avatar Daniel Newbrook
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Add final ip to synthesis script

parent 990efd1a
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......@@ -58,6 +58,18 @@ read_hdl ./cortexm0_integration/verilog/cortexm0_rst_ctl.v
read_hdl ./cortexm0_integration/verilog/cortexm0_wic.v
read_hdl ./cortexm0_integration/verilog/CORTEXM0INTEGRATION.v
set_db init_hdl_search_path $::env(ARM_IP_LIBRARY_PATH)/latest/Cortex-M0/logical/models/cells/
read_hdl cm0_rst_sync.v
read_hdl cm0_rst_send_set.v
read_hdl cm0_dbg_reset_sync.v
read_hdl cm0_acg.v
read_hdl cm0_pmu_sync_set.v
read_hdl cm0_pmu_sync_reset.v
read_hdl cm0_pmu_cdc_send_set.v
read_hdl cm0_pmu_cdc_send_reset.v
read_hdl cm0_pmu_acg.v
set_db init_hdl_search_path $::env(ARM_IP_LIBRARY_PATH)/latest/Corstone-101/logical/
read_hdl ./cmsdk_ahb_gpio/verilog/cmsdk_ahb_to_iop.v
......@@ -81,6 +93,11 @@ read_hdl ./cmsdk_apb_subsystem/verilog/cmsdk_irq_sync.v
read_hdl ./cmsdk_ahb_master_mux/verilog/cmsdk_ahb_master_mux.v
read_hdl ./models/clkgate/cmsdk_clock_gate.v
read_hdl ./cmsdk_ahb_to_sram/verilog/cmsdk_ahb_to_sram.v
read_hdl ./models/memories/cmsdk_ahb_rom.v
read_hdl ./models/memories/cmsdk_ahb_ram.v
read_hdl ./models/memories/cmsdk_fpga_rom.v
read_hdl ./models/memories/cmsdk_fpga_sram.v
read_hdl ./models/memories/cmsdk_ahb_memory_models_defs.v
set_db init_hdl_search_path $::env(SOCLABS_NANOSOC_TECH_DIR)/system/test_io/verilog/
......@@ -102,6 +119,7 @@ read_hdl ./verilog/nanosoc_mcu_pin_mux.v
read_hdl ./verilog/nanosoc_mcu_sysctrl.v
read_hdl ./verilog/nanosoc_sys_ahb_decode.v
read_hdl ./verilog/nanosoc_sysio.v
read_hdl ./bootrom/verilog/bootrom.v
#set_db init_hdl_search_path $::env(ARM_IP_LIBRARY_PATH)/latest/DMA-230/
set_db init_hdl_search_path $::env(SOCLABS_NANOSOC_TECH_DIR)/system/defines/
......
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