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Commit 327ba256 authored by dam1n19's avatar dam1n19
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SOC1-167: Attempt 2 at fpga verilog define

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system/fpga_imp/scripts/build_mcu_fpga_ip.tcl
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...@@ -57,6 +57,7 @@ source scripts/rtl_source_soclabs_ip.tcl ...@@ -57,6 +57,7 @@ source scripts/rtl_source_soclabs_ip.tcl
#source scripts/rtl_source_fpga_ip.tcl #source scripts/rtl_source_fpga_ip.tcl
# soclabs modified mcu system # soclabs modified mcu system
set_property verilog_define {NANSOC_EXPANSION_REGION=1} [current_fileset]
set soc_vlog ../src set soc_vlog ../src
read_verilog $soc_vlog/nanosoc_ahb_busmatrix/verilog/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_default_slave.v read_verilog $soc_vlog/nanosoc_ahb_busmatrix/verilog/nanosoc_ahb32_4x7_busmatrix/nanosoc_ahb32_4x7_busmatrix_default_slave.v
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