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SoCLabs
NanoSoC Tech
Commits
321e588b
Commit
321e588b
authored
1 year ago
by
dam1n19
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Updated waiver to lint clean nanosoc
parent
9cbbf87f
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1 merge request
!1
changed imem to rom to allow initial program loading, updated bootloader code...
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hal/nanosoc_ip.waive
+21
-0
21 additions, 0 deletions
hal/nanosoc_ip.waive
system/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v
+2
-3
2 additions, 3 deletions
system/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v
with
23 additions
and
3 deletions
hal/nanosoc_ip.waive
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321e588b
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@@ -19,6 +19,24 @@ lint_checking designunit = nanosoc_chip_pads
// Input/Output PIns decalred as inout so may have multiple drivers
GLTASR off;
// Simple Glue-logic at top-level
ATLGLC off;
// Inout Pads at top-level
IOCOMB {"P0|P1"} off;
IOPNTA {"XTAL1|XTAL2|NRST|P0|P1|SWDIOTMS|SWCLKTCK"} off;
MULWIR {"XTAL1|XTAL2|NRST|P0|P1|SWDIOTMS|SWCLKTCK"} off;
// Reset Name Changes in hierarchy
RSTUCL {"PRESETn"} off;
// Output on pad disconnected
UNCONN {"uPAD_XTAL_O"} off;
// Pad output signals not wired up (Technology dependent)
UNCONO {"p0_e|p1_e|swdio_e|I"} off;
URDWIR {"p0_e|p1_e|swdio_e"} off;
}
lint_checking designunit = nanosoc_chip
...
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@@ -304,6 +322,9 @@ lint_checking designunit = nanosoc_clkctrl
// Some Ports Unused (Arm IP)
USEPRT off;
// Asynchronous Reset
ACNCPI {"NRST"} off;
}
lint_checking designunit = nanosoc_pin_mux
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system/nanosoc_chip/pads/glib/verilog/nanosoc_chip_pads.v
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321e588b
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@@ -6,7 +6,7 @@
//
// David Flynn (d.w.flynn@soton.ac.uk)
//
// Copyright 2021-3, SoC Labs (www.soclabs.org)
// Copyright
�
2021-3, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
...
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@@ -77,8 +77,7 @@ module nanosoc_chip_pads (
// Cortex-M0 nanosoc Microcontroller
// --------------------------------------------------------------------------------
nanosoc_chip
u_nanosoc_chip
(
nanosoc_chip
u_nanosoc_chip
(
`ifdef
POWER_PINS
.
VDDIO
(
VDDIO
),
.
VSSIO
(
VSSIO
),
...
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