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Commit 321e588b authored by dam1n19's avatar dam1n19
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Updated waiver to lint clean nanosoc

parent 9cbbf87f
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1 merge request!1changed imem to rom to allow initial program loading, updated bootloader code...
......@@ -19,6 +19,24 @@ lint_checking designunit = nanosoc_chip_pads
// Input/Output PIns decalred as inout so may have multiple drivers
GLTASR off;
// Simple Glue-logic at top-level
ATLGLC off;
// Inout Pads at top-level
IOCOMB {"P0|P1"} off;
IOPNTA {"XTAL1|XTAL2|NRST|P0|P1|SWDIOTMS|SWCLKTCK"} off;
MULWIR {"XTAL1|XTAL2|NRST|P0|P1|SWDIOTMS|SWCLKTCK"} off;
// Reset Name Changes in hierarchy
RSTUCL {"PRESETn"} off;
// Output on pad disconnected
UNCONN {"uPAD_XTAL_O"} off;
// Pad output signals not wired up (Technology dependent)
UNCONO {"p0_e|p1_e|swdio_e|I"} off;
URDWIR {"p0_e|p1_e|swdio_e"} off;
}
lint_checking designunit = nanosoc_chip
......@@ -304,6 +322,9 @@ lint_checking designunit = nanosoc_clkctrl
// Some Ports Unused (Arm IP)
USEPRT off;
// Asynchronous Reset
ACNCPI {"NRST"} off;
}
lint_checking designunit = nanosoc_pin_mux
......
......@@ -6,7 +6,7 @@
//
// David Flynn (d.w.flynn@soton.ac.uk)
//
// Copyright 2021-3, SoC Labs (www.soclabs.org)
// Copyright 2021-3, SoC Labs (www.soclabs.org)
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
......@@ -77,8 +77,7 @@ module nanosoc_chip_pads (
// Cortex-M0 nanosoc Microcontroller
// --------------------------------------------------------------------------------
nanosoc_chip
u_nanosoc_chip (
nanosoc_chip u_nanosoc_chip (
`ifdef POWER_PINS
.VDDIO (VDDIO),
.VSSIO (VSSIO),
......
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