update system wiring

system/nanosoc_regions/systable/verilog/nanosoc_coresight_systable.v

@@ -84,7 +84,7 @@ module nanosoc_coresight_systable
     // ------------------------------------------------------------
     // ROM Table Manufacturer, Part Number and Revision
     // ------------------------------------------------------------
-    parameter [6:0]    JEPID           = 7'd0000000, // JEP106 identity code
+    parameter [6:0]    JEPID           = 7'd0, // JEP106 identity code
     parameter [3:0]    JEPCONTINUATION = 4'h0,       // number of JEP106
                                                      // continuation codes
     parameter [11:0]   PARTNUMBER      = 12'h000,    // part number

system/nanosoc_system/verilog/nanosoc_system.v

@@ -190,6 +190,7 @@ module nanosoc_system #(
     wire          BOOTROM_0_HMASTLOCK;    // Locked Sequence
     wire   [31:0] BOOTROM_0_HRDATA;       // Read data bus
     wire          BOOTROM_0_HREADY;       // HREADY feedback
+    wire          BOOTROM_0_HREADYOUT;    // HREADY feedback
     wire          BOOTROM_0_HRESP;        // Transfer response
     
     // Instruction Memory 0 Region Wiring - To Interconnect Subsystem
@@ -204,6 +205,7 @@ module nanosoc_system #(
     wire          IMEM_0_HMASTLOCK;       // Locked Sequence
     wire   [31:0] IMEM_0_HRDATA;          // Read data bus
     wire          IMEM_0_HREADY;          // HREADY feedback
+    wire          IMEM_0_HREADYOUT;       // HREADY feedback
     wire          IMEM_0_HRESP;           // Transfer response
     
     // Data Memory 0 Region Wiring - To Interconnect Subsystem
@@ -218,6 +220,7 @@ module nanosoc_system #(
     wire          DMEM_0_HMASTLOCK;       // Locked Sequence
     wire   [31:0] DMEM_0_HRDATA;          // Read data bus
     wire          DMEM_0_HREADY;          // HREADY feedback
+    wire          DMEM_0_HREADYOUT;       // HREADY feedback
     wire          DMEM_0_HRESP;           // Transfer response
     
     // CPU Sideband Signaling  - To System Control Subsystem
@@ -1079,7 +1082,7 @@ module nanosoc_system #(
         .EXPRAM_L_HBURST(EXPRAM_L_HBURST),
         .EXPRAM_L_HPROT(EXPRAM_L_HPROT),
         .EXPRAM_L_HWDATA(EXPRAM_L_HWDATA),
-        .EXPRAM_L_HMASTLOCK(EXPRAM_L_HMASTLOCK),
+        .EXPRAM_L_HMASTLOCK(),
         .EXPRAM_L_HREADYMUX(EXPRAM_L_HREADY),
 
         // Expansion Memory High Region Slave Port
@@ -1094,7 +1097,7 @@ module nanosoc_system #(
         .EXPRAM_H_HBURST(EXPRAM_H_HBURST),
         .EXPRAM_H_HPROT(EXPRAM_H_HPROT),
         .EXPRAM_H_HWDATA(EXPRAM_H_HWDATA),
-        .EXPRAM_H_HMASTLOCK(EXPRAM_H_HMASTLOCK),
+        .EXPRAM_H_HMASTLOCK(),
         .EXPRAM_H_HREADYMUX(EXPRAM_H_HREADY),
 
         // Expansion Region Slave Port
@@ -1109,7 +1112,7 @@ module nanosoc_system #(
         .EXP_HBURST(EXP_HBURST),
         .EXP_HPROT(EXP_HPROT),
         .EXP_HWDATA(EXP_HWDATA),
-        .EXP_HMASTLOCK(EXP_HMASTLOCK),
+        .EXP_HMASTLOCK(),
         .EXP_HREADYMUX(EXP_HREADY),
 
         // System ROM Table Region Slave Port