Update readme and add file headers

.gitignore

@@ -9,3 +9,5 @@ verif/cocotb/*.wlf
 verif/cocotb/transcript
 verif/cocotb/results.xml
 verif/cocotb/*.ini
+
+imp

README.md

 # MilliSoC Expansion Tech
+Part of the milliSoC SoC reference design. This expansion sub-system is where you will integrate your accelerator IP into.
+This subsystem includes a DMA-350, 2x 128 bit SRAMs, and an adress region for your accelerator.
+The purpose of this subsystem is deliver high bandwidth data to and from your hardware accelerator. The NIC400 bus with DMA-350 as master can reach bandwidths of 106 Gbps at a clock speed of 1 GHz
 
 
+## Pre-requisites
+You will need the following IP from Arm, all available through Arm Academic Access (AAA)
+    -   DMA-350
+    -   BP301
+    -   NIC400
 
-## Getting started
+You will also need installed
+    -   Socrates
+    -   CocoTB
+    -   A simulator (e.g. QuestaSim, VCS, xelium)
 
-To make it easy for you to get started with GitLab, here's a list of recommended next steps.
+For FPGA development you will need a Vivado installation
 
-Already a pro? Just edit this README.md and make it your own. Want to make it easy? [Use the template at the bottom](#editing-this-readme)!
-
-## Add your files
-
-- [ ] [Create](https://docs.gitlab.com/ee/user/project/repository/web_editor.html#create-a-file) or [upload](https://docs.gitlab.com/ee/user/project/repository/web_editor.html#upload-a-file) files
-- [ ] [Add files using the command line](https://docs.gitlab.com/ee/gitlab-basics/add-file.html#add-a-file-using-the-command-line) or push an existing Git repository with the following command:
-
-```
-cd existing_repo
-git remote add origin https://git.soton.ac.uk/soclabs/millisoc_expansion_tech.git
-git branch -M main
-git push -uf origin main
-```
-
-## Integrate with your tools
-
-- [ ] [Set up project integrations](https://git.soton.ac.uk/soclabs/millisoc_expansion_tech/-/settings/integrations)
-
-## Collaborate with your team
-
-- [ ] [Invite team members and collaborators](https://docs.gitlab.com/ee/user/project/members/)
-- [ ] [Create a new merge request](https://docs.gitlab.com/ee/user/project/merge_requests/creating_merge_requests.html)
-- [ ] [Automatically close issues from merge requests](https://docs.gitlab.com/ee/user/project/issues/managing_issues.html#closing-issues-automatically)
-- [ ] [Enable merge request approvals](https://docs.gitlab.com/ee/user/project/merge_requests/approvals/)
-- [ ] [Set auto-merge](https://docs.gitlab.com/ee/user/project/merge_requests/merge_when_pipeline_succeeds.html)
-
-## Test and Deploy
-
-Use the built-in continuous integration in GitLab.
-
-- [ ] [Get started with GitLab CI/CD](https://docs.gitlab.com/ee/ci/quick_start/index.html)
-- [ ] [Analyze your code for known vulnerabilities with Static Application Security Testing (SAST)](https://docs.gitlab.com/ee/user/application_security/sast/)
-- [ ] [Deploy to Kubernetes, Amazon EC2, or Amazon ECS using Auto Deploy](https://docs.gitlab.com/ee/topics/autodevops/requirements.html)
-- [ ] [Use pull-based deployments for improved Kubernetes management](https://docs.gitlab.com/ee/user/clusters/agent/)
-- [ ] [Set up protected environments](https://docs.gitlab.com/ee/ci/environments/protected_environments.html)
-
-***
-
-# Editing this README
-
-When you're ready to make this README your own, just edit this file and use the handy template below (or feel free to structure it however you want - this is just a starting point!). Thanks to [makeareadme.com](https://www.makeareadme.com/) for this template.
-
-## Suggestions for a good README
-
-Every project is different, so consider which of these sections apply to yours. The sections used in the template are suggestions for most open source projects. Also keep in mind that while a README can be too long and detailed, too long is better than too short. If you think your README is too long, consider utilizing another form of documentation rather than cutting out information.
-
-## Name
-Choose a self-explaining name for your project.
-
-## Description
-Let people know what your project can do specifically. Provide context and add a link to any reference visitors might be unfamiliar with. A list of Features or a Background subsection can also be added here. If there are alternatives to your project, this is a good place to list differentiating factors.
-
-## Badges
-On some READMEs, you may see small images that convey metadata, such as whether or not all the tests are passing for the project. You can use Shields to add some to your README. Many services also have instructions for adding a badge.
-
-## Visuals
-Depending on what you are making, it can be a good idea to include screenshots or even a video (you'll frequently see GIFs rather than actual videos). Tools like ttygif can help, but check out Asciinema for a more sophisticated method.
+## Usage
 
-## Installation
-Within a particular ecosystem, there may be a common way of installing things, such as using Yarn, NuGet, or Homebrew. However, consider the possibility that whoever is reading your README is a novice and would like more guidance. Listing specific steps helps remove ambiguity and gets people to using your project as quickly as possible. If it only runs in a specific context like a particular programming language version or operating system or has dependencies that have to be installed manually, also add a Requirements subsection.
 
-## Usage
-Use examples liberally, and show the expected output if you can. It's helpful to have inline the smallest example of usage that you can demonstrate, while providing links to more sophisticated examples if they are too long to reasonably include in the README.
+## Accelerator integration
+The subsystem has an expansion region where you can integrate your accelerator. This includes a full AXI slave port with 128-bit data width, an APB port for register interfacing with your accelerator, as well as clock and power control (Q and P-channel).
 
 ## Support
-Tell people where they can go to for help. It can be any combination of an issue tracker, a chat room, an email address, etc.
-
-## Roadmap
-If you have ideas for releases in the future, it is a good idea to list them in the README.
+For support please go to soclabs.org
 
 ## Contributing
-State if you are open to contributions and what your requirements are for accepting them.
-
-For people who want to make changes to your project, it's helpful to have some documentation on how to get started. Perhaps there is a script that they should run or some environment variables that they need to set. Make these steps explicit. These instructions could also be useful to your future self.
-
-You can also document commands to lint the code or run tests. These steps help to ensure high code quality and reduce the likelihood that the changes inadvertently break something. Having instructions for running tests is especially helpful if it requires external setup, such as starting a Selenium server for testing in a browser.
+Open to collaborations, if you're interested please head over to soclabs.org and register your interest on the millisoc reference design project
 
 ## Authors and acknowledgment
-Show your appreciation to those who have contributed to the project.
-
-## License
-For open source projects, say how it is licensed.
+Daniel Newbrook (d.newbrook@soton.ac.uk)
 
 ## Project status
-If you have run out of energy or time for your project, put a note at the top of the README saying that development has slowed down or stopped completely. Someone may choose to fork your project or volunteer to step in as a maintainer or owner, allowing your project to keep going. You can also make an explicit request for maintainers.
+Under Development
\ No newline at end of file

logical/SRAM/verilog/SRAM_wrapper.v

+//-----------------------------------------------------------------------------
+// MilliSoC SRAM Wrapper
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// Daniel Newbrook (d.newbrook@soton.ac.uk)
+// 
+// Copyright � 2021-4, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+// Modules instantiated:
+//  sie300_axi5_sram_ctrl_millisoc_exp
+//  SRAM
 
 module SRAM_wrapper(
     input  wire             ACLK,

logical/expansion_region/verilog/expansion_region.v

-
+//-----------------------------------------------------------------------------
+// MilliSoC Expansion Region
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// Daniel Newbrook (d.newbrook@soton.ac.uk)
+// 
+// Copyright � 2021-4, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
 
 module expansion_region(
     input  wire         clk,

logical/top_millisoc_expansion/verilog/millisoc_expansion_wrapper.v

+//-----------------------------------------------------------------------------
+// MilliSoC Expansion Wrapper
+// A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+//
+// Contributors
+//
+// Daniel Newbrook (d.newbrook@soton.ac.uk)
+// 
+// Copyright � 2021-4, SoC Labs (www.soclabs.org)
+//-----------------------------------------------------------------------------
+// Modules instantiated:
+//  ada_top_sldma350
+//  expansion_region
+//  SRAM_wrapper
+//  nic400_millisoc_expansion
 `timescale 1ns/1ps
 
+
 module millisoc_expansion_wrapper(
     input wire          sys_clk,
     input wire          resetn,

makefile

@@ -7,7 +7,7 @@
 #
 # David Flynn (d.w.flynn@soton.ac.uk)
 # Daniel Newbrook (d.newbrook@soton.ac.uk)
-# Copyright (C) 2021-3, SoC Labs (www.soclabs.org)
+# Copyright (C) 2021-4, SoC Labs (www.soclabs.org)
 #-----------------------------------------------------------------------------
 
 include ./flows/makefile.simulate
@@ -17,11 +17,11 @@ build_dma350:
 build_sie300_sram_ctrl:
 	@$(SIE300_IP_LOGICAL_DIR)/generate --config ./socrates/BP301_SRAM/config/SRAM_ctrl.yaml --output ./logical/SMC
 build_nic400:
-	socrates_cli --project millisoc_expansion -data ../ --flow build.configured.component configuredComponentName=nic400_millisoc_expansion
+	socrates_cli --project millisoc_expansion_tech -data ../ --flow build.configured.component configuredComponentName=nic400_millisoc_expansion
 build_ip: build_dma350 build_sie300_sram_ctrl build_nic400
 
 make_project:
-	socrates_cli --project millisoc_expansion -data ../ --flow AddNewProject
+	socrates_cli --project millisoc_expansion_tech -data ../ --flow AddNewProject
 
 first_time_setup: make_project build_ip
 

set_exp_env.sh

+#-----------------------------------------------------------------------------
+# MilliSoC Expansion set environment variables
+# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+#
+# Contributors
+#
+# Daniel Newbrook (d.newbrook@soton.ac.uk)
+# 
+# Copyright � 2021-4, SoC Labs (www.soclabs.org)
+#-----------------------------------------------------------------------------
+
 export SOCLABS_MILLISOC_EXP_DIR=$(pwd)
\ No newline at end of file

verif/cocotb/dma350.py

+#-----------------------------------------------------------------------------
+# DMA350 CocoTB library 
+# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+#
+# Contributors
+#
+# Daniel Newbrook (d.newbrook@soton.ac.uk)
+# 
+# Copyright � 2021-4, SoC Labs (www.soclabs.org)
+#-----------------------------------------------------------------------------
+# Available functions
+#   AdaGetChNum
+#   AdaGetIIDR
+#   AdaSetSourceAddress
+#   AdaSetDestAddress
+#   AdaSetTranSize
+#   AdaSetChControl
+#   AdaSetChDESTRANSCFG
+#   AdaSetChSRCTRANSCFG
+#   AdaSetChXADDRINC
+#   AdaEnable
+#   AdaGetEnable
+#   AdaGetStatus
+#   AdaSetIntrEn
+#   AdaGetIntrEn
+
 import itertools
 import logging
 import os

verif/cocotb/dma350_regtype.py

+#-----------------------------------------------------------------------------
+# DMA350 Register Enumerations 
+# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+#
+# Contributors
+#
+# Daniel Newbrook (d.newbrook@soton.ac.uk)
+# 
+# Copyright � 2021-4, SoC Labs (www.soclabs.org)
+#-----------------------------------------------------------------------------
+
 from enum import Enum
 
 class TRANSIZE_type(Enum):

verif/cocotb/millisoc_expansion_tests.py

+#-----------------------------------------------------------------------------
+# MilliSoC Expansion cocoTB script
+# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+#
+# Contributors
+#
+# Daniel Newbrook (d.newbrook@soton.ac.uk)
+# 
+# Copyright � 2021-4, SoC Labs (www.soclabs.org)
+#-----------------------------------------------------------------------------
+# CocoTB Testcases:
+#   SRAM_0_test_write
+#   SRAM_0_test_write_words
+#   SRAM_1_test_write
+#   SRAM_1_test_write_words
+#   DMA350_detect
+#   DMA350_basic_transfer
+
 import itertools
 import logging
 import os